Electronic Components Datasheet Search
  English  ▼

X  

7540 Datasheet(PDF) 298 Page - Renesas Technology Corp

Part # 7540
Description  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 740 SERIES
PDF  366 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7540 Datasheet(HTML) 298 Page - Renesas Technology Corp

Back Button 7540 Datasheet HTML 294Page - Renesas Technology Corp 7540 Datasheet HTML 295Page - Renesas Technology Corp 7540 Datasheet HTML 296Page - Renesas Technology Corp 7540 Datasheet HTML 297Page - Renesas Technology Corp 7540 Datasheet HTML 298Page - Renesas Technology Corp 7540 Datasheet HTML 299Page - Renesas Technology Corp 7540 Datasheet HTML 300Page - Renesas Technology Corp 7540 Datasheet HTML 301Page - Renesas Technology Corp 7540 Datasheet HTML 302Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 298 / 366 page
background image
3-76
REJ09B0018-0200Z
Rev.2.00
Jun 21, 2004
APPENDIX
7540 Group
3.3 Notes on use
3.3.6 Notes on Timer X
Notes on using each mode of timer X are described below.
(1) Count source
➀ f(XIN) can be used only when a ceramic oscillator or an on-chip oscillator is used.
Do not use f(XIN) at RC oscillation.
(2) Pulse output mode
➀ In order to use CNTR0 pin, set “1” to bit 4 of the port P1 direction register (output mode).
➁ In order to use TXOUT pin, set “1” to bit 3 of the port P0 direction register (output mode).
➂ CNTR0 interrupt active edge depends on the CNTR0 active edge switch bit. When this bit is “0”,
the CNTR0 interrupt request bit is set to “1” at the falling edge of CNTR0 pin input signal. When
this bit is “1”, the CNTR0 interrupt request bit is set to “1” at the rising edge of CNTR0 pin input
signal.
(3) Pulse width measurement mode
➀ In order to use CNTR0 pin, set “1” to bit 4 of the port P1 direction register (output mode).
➁ CNTR0 interrupt active edge depends on the CNTR0 active edge switch bit. When this bit is “0”,
the CNTR0 interrupt request bit is set to “1” at the falling edge of CNTR0 pin input signal. When
this bit is “1”, the CNTR0 interrupt request bit is set to “1” at the rising edge of CNTR0 pin input
signal.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com