7220 datasheet(215/303 Pages) RENESAS

215 / 303 page

5-42

APPLICATION

5.5 Example of I2C-BUS control by software (M37220M3-XXXSP/FP)

7220 Group User’s Manual

s DELAY ADJ

This adjusts the RF AGC delay point.

The output level of tuner decreases when the value

increase, the output level increases when the value decreases.

s POS/NEG

This switch sets the VIF output signal to either the positive or the negative modulation signal.

When “0,” the negative modulation signal is selected; when “1,” the positive modulation signal is

selected.

s VCO ADJ

This register changes the free running frequency of VIF VCO. The frequency increases when the

value increases, the frequency decreases when the value decreases.

s A MUTE

This is the audio mute ON/OFF.

s 4.5/6.0

This bit must be set to “1” when the sound carrier frequency is 4.5 MHz. Set “0” when the

frequency is other values.

s DFA, DL TIME

In order to adjust the color signal and the luminance signal is delayed using the on-chip delay-line.

The DL TIME register adjusts the delay approximately, and the DFA register performes the fine

adjustments. When DFA is “1,” actual delay time is +50 ns; when “0,” it is +0 ns. For relationship

between DFA and DL TIME, refer to “Table 5.5.9.”

s DBF

The M52340SP has 2 TRAP; the second TRAP extends the bandwidth of the TRAP, described

below. DBF is the ON/OFF switch for the second TRAP. When “1,” it is on; when “0,” it is off. DBF

is used in SECAM and other methods.

s TRAP

This is the TRAP ON/OFF switch for taking out the luminance signal (Y-signal) by Y/C separation

(Y = Y-signal, C = color signal) of the composite video signal. When “1,” it is on; when “0,” it is

off.

s AUDIO ATT

Data is set (“0” to “127”) to change the volume.

Data

TIME1

Actual

delay time

170 ns

120 ns

330 ns

280 ns

410 ns

360 ns

490 ns

440 ns

TIME0

DFA

Table 5.5.9 Relationship between DFA and DL TIME

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