7220 datasheet(250/303 Pages) RENESAS

250 / 303 page

7220 Group User’s Manual

APPENDIX

6.7 Control registers

6-31

Fig. 6.7.3 Port P5 direction register

Fig. 6.7.4 Port P3 output mode control register

b7 b6 b5 b4 b3 b2 b1 b0

Port P3 output mode control register (P3S) [address 00CD16]

Name

Functions

After reset R W

Port P3 output mode control register

0 : CMOS output

1 : N-channel open-drain output

P30 output structure

selection bit (P30S)

P31 output structure

selection bit (P31S)

Nothing is assigned. These bits are write disable bits.

When these bits are read out, the values are “0.”

0 : CMOS output

1 : N-channel open-drain output

2, 3

Note: M37220M3-XXXSP/FP

DA1 output enable bit

0 : P30 input/output

1 : DA1 output

DA2 output enable bit

0 : P31 input/output

1 : DA2 output

Fix thes bits to “0.”

R—

(See note)

Address 00CD16

b7 b6 b5 b4 b3 b2 b1 b0

Port P5 direction register (D5) [Address 00CB16]

Name

Functions

After reset RW

Port P5 Direction Register

0, 1

0 : CRT output (R)

1 : Output port P52

0 : CRT output (G)

1 : Output port P53

0 : CRT output (B)

1 : Output port P54

Port P5 direction register

Nothing is assigned. These bits are write disable bits.

When these bits are read out, the values are “0.”

Nothing is assigned. These bits are write disable bits.

When these bits are read out, the values are “0.”

6, 7

0 : CRT output (OUT1)

1 : Output port P55

R—

Address 00CB16

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