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7220 Datasheet(PDF) 252 Page - Renesas Technology Corp |
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7220 Datasheet(HTML) 252 Page - Renesas Technology Corp |
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252 / 303 page ![]() 7220 Group User’s Manual APPENDIX 6.7 Control registers 6-33 Fig. 6.7.7 I2C data shift register Fig. 6.7.8 I2C address register b7 b6 b5 b4 b3 b2 b1 b0 I C data shift register (S0) [Address 00D716] B Functions After reset RW I C Data Shift Register 0 to 7 This is an 8-bit shift register to store receive data and write transmit data. Indeterminate 2 2 Note: 2 To write data into the I C data shift register after setting the MST bit to “0” (slave mode), keep an interval of 8 machine cycles or more. Name D0 to D7 RW b7 b6 b5 b4 b3 b2 b1 b0 0 Read/write bit (RBW) 1 to 7 Slave address (SAD0 to SAD6) 0: Read 1: Write 0 0 The address data transmitted from the master is compared with the contents of these bits. I2C Address Register I2C address register (S0D) [Address 00D816] B Name Functions After reset RW RW RW Address 00D716 Address 00D816 |
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