7220 datasheet(270/303 Pages) RENESAS

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7220 Group User’s Manual

APPENDIX

6.8 Ports

6-51

6.8 Ports

Fig. 6.8.1 I/O pin block diagram (1)

P06/INT2/A-D4, P0 7/INT1

N-channel open-drain output

Data bus

Direction register

Port latch

N-channel open-drain output

P00/PWM0–P05/PWM5, P32

Data bus

Direction register

Port latch

indicates a pin.

qM37221M4-XXXSP, M37221M6-XXXSP/FP, M37221M8-XXXSP, M37221MA-XXXSP

P10/OUT2, P11/SCL1, P12/SCL2, P13/SDA1, P14/SDA2, P15/A-D1/INT3, P1 6/A-D2, P17/A-D3,

P20/SCLK, P21/SOUT, P22/SIN, P23/TIM3, P24/TIM2, P25–P27, P30/A-D5, P31/A-D6 (See notes 1, 2)

qM37220M3-XXXSP/FP

P10–P14, P15/A-D/INT3, P1 6/A-D2, P17/A-D3, P20/SCLK, P21/SOUT, P22/SIN,

P23/TIM3, P24/TIM2, P25–P27, P30/A-D5/DA1, P3 1/A-D6/DA2 (See note 2)

CMOS output

Notes 1 :

Data bus

Direction register

Port latch

When ports P11–P14 are used as multi-master I C-BUS interface pin and when ports P2

serial I/O output pins, their output structure is N-channel open-drain output.

For the output structure of ports P3

(In the case of N-channel open-drain output, the block diagram is the same as below).

2 :

, P21 are used as

, P31, either CMOS output or N-channel open-drain output is selected

7220 Datasheet(PDF) 270 Page - Renesas Technology Corp