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HD6413005F Datasheet(PDF) 7 Page - Renesas Technology Corp |
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HD6413005F Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 497 page ![]() Contents Section 1 Overview...................................................................................................... 1 1.1 Overview ........................................................................................................................ 1 1.2 Block Diagram................................................................................................................4 1.3 Pin Description ............................................................................................................... 5 1.3.1 Pin Arrangement ............................................................................................. 5 1.3.2 Pin Functions .................................................................................................. 6 1.4 Pin Functions .................................................................................................................. 9 Section 2 CPU ............................................................................................................... 13 2.1 Overview ........................................................................................................................ 13 2.1.1 Features........................................................................................................... 13 2.1.2 Differences from H8/300 CPU ....................................................................... 14 2.2 CPU Operating Modes.................................................................................................... 15 2.3 Address Space................................................................................................................. 16 2.4 Register Configuration.................................................................................................... 17 2.4.1 Overview......................................................................................................... 17 2.4.2 General Registers............................................................................................ 18 2.4.3 Control Registers ............................................................................................ 19 2.4.4 Initial CPU Register Values ............................................................................ 20 2.5 Data Formats................................................................................................................... 21 2.5.1 General Register Data Formats....................................................................... 21 2.5.2 Memory Data Formats .................................................................................... 22 2.6 Instruction Set................................................................................................................. 24 2.6.1 Instruction Set Overview ................................................................................ 24 2.6.2 Instructions and Addressing Modes................................................................ 25 2.6.3 Tables of Instructions Classified by Function................................................. 26 2.6.4 Basic Instruction Formats ............................................................................... 36 2.6.5 Notes on Use of Bit Manipulation Instructions .............................................. 37 2.7 Addressing Modes and Effective Address Calculation .................................................. 37 2.7.1 Addressing Modes .......................................................................................... 37 2.7.2 Effective Address Calculation ........................................................................ 40 2.8 Processing States ............................................................................................................44 2.8.1 Overview......................................................................................................... 44 2.8.2 Program Execution State ................................................................................ 45 2.8.3 Exception-Handling State ............................................................................... 45 2.8.4 Exception-Handling Sequences ...................................................................... 47 2.8.5 Reset State ...................................................................................................... 48 2.8.6 Power-Down State .......................................................................................... 48 |
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