HD6413005F datasheet(17/497 Pages) RENESAS

17 / 497 page

Table 1-1 Features (cont)

Feature

Description

Watchdog

• Reset signal can be generated by overflow

timer (WDT),

• Reset signal can be output externally

1 channel

• Usable as an interval timer

Serial

• Selection of asynchronous or synchronous mode

communication

• Full duplex: can transmit and receive simultaneously

interface (SCI),

• On-chip baud-rate generator

1 channel

A/D converter

• Resolution: 10 bits

• Eight channels, with selection of single or scan mode

• Variable analog conversion voltage range

• Sample-and-hold function

• Can be externally triggered

I/O ports

• 21 input/output pins

• 11 input-only pins

Operating modes Two MCU operating modes

Address

Mode

Space

Pins

Mode 1

1 Mbyte

A0 to A19

Mode 3

16 Mbyte

A0 to A23

Power-down

• Sleep mode

state

• Software standby mode

• Hardware standby mode

Other features

• On-chip clock oscillator

Product lineup

Power Supply

Model

Package

Voltage

HD6413004F

80-pin QFP (FP-80A)

5 V ±10%

HD6413004VF

2.7 to 5.5 V

HD6413004TE

80-pin TQFP (TFP-80C)

5 V ±10%

HD6413004VTE

2.7 V to 5.5 V

HD6413005F

80-pin QFP (FP-80A)

5 V ±10%

HD6413005VF

2.7 V to 5.5 V

HD6413005TE

80-pin TQFP (TFP-80C)

5 V ±10%

HD6413005VTE

2.7 V to 5.5 V

HD6413005F Datasheet(PDF) 17 Page - Renesas Technology Corp

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