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H83069RF Datasheet(PDF) 175 Page - Renesas Technology Corp

Part # H83069RF
Description  Renesas 16-Bit Single-Chip Microcomputer
PDF  1003 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H83069RF Datasheet(HTML) 175 Page - Renesas Technology Corp

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Rev. 5.0, 09/04, page 153 of 978
Bus cycle
External address in area n
Valid
Valid
φ
Address bus
CSn
AS
RD
D15 to D8
D7 to D0
HWR
LWR
D15 to D8
D7 to D0
Read access
Write access
Note: n = 7 to 0
T1
T2
Valid
Valid
Figure 6.16 Bus Control Signal Timing for 16-Bit, Two-State-Access Area (3)
(Word Access)
6.4.6
Wait Control
When accessing external space, the H8/3069R can extend the bus cycle by inserting one or more
wait states (T
w).
There are two ways of inserting wait states: (1) program wait insertion and (2)
pin wait insertion using the
WAIT pin.
Program Wait Insertion: From 0 to 3 wait states can be inserted automatically between the T
2
state and T
3 state on an individual area basis in three-state access space, according to the settings
of WCRH and WCRL.
Pin Wait Insertion: Setting the WAITE bit in BCR to 1 enables wait insertion by means of the
WAIT pin. When external space is accessed in this state, a program wait is first inserted. If the
WAIT pin is low at the falling edge of φ in the last T
2 or TW state, another TW state is inserted.
If
the
WAIT pin is held low, T
W states are inserted until it goes high.



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