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TLC5944PWPR Datasheet(PDF) 23 Page - Texas Instruments |
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TLC5944PWPR Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 34 page ![]() Thermal Shutdown and Thermal Error Flag ICJunction Temperature(T ) J ‘1’ T <T J (PTW) T T ³ J (TEF) T <T - T J (PTW) (HYSP) T T ³ J (TEF) ‘0’ XLAT PTWinSID (InternalData) XERR OUTn GSCLK OFF ON ‘0’ Hi-Z ‘L’ OFF SCLK ‘0’ TEFinSID (InternalData) ‘0’ ‘1’ T T ³ J (PTW) T - <T T J (TEF) (HYST) T T ³ J (PTW) ‘1’ ‘1’ Hi-Z ‘L’ OFF ON BLANK 1 4 3 2 4093 4096 4095 4094 1 3 2 Internal Pre-Charge FET TLC5944 www.ti.com ...................................................................................................................................................................................................... SBVS112 – JUNE 2008 The thermal shutdown (TSD) function turns off all of the constant current outputs on the IC immediately when the junction temperature (TJ) exceeds the threshold (T(TEF) = +162°C, typ) and sets the thermal error flag (TEF) to '1'. All outputs are latched off when TEF is set to '1'; TEF and PTW remain off until the next grayscale cycle after TJ drops below (T(TEF) – T(HYST)). TEF is set to '0' once TJ drops below (T(TEF) – T(HYST)), but the output does not turn on until the first GSCLK after BLANK goes low while TEF is set to '0'. Figure 32 illustrates the TEF/TSD/XERR timing sequence. Figure 32. TEF/TSD/XERR Timing The internal pre-charge FET can prevent ghosting of multiplexed LED modules. One cause of this phenomenon is the charging current for parastic capacitance of the constant current output line and driver through the LED. One of the mechanisms is shown in Figure 33. In Figure 33, the constant current driver turns LED0-0 on at (1) and off at (2). After LED0-0 is turned off, OUT0 voltage is pulled up to VCHG by LED0-0. This OUT0 node has some parasitic capacitance (such as the constant current driver output capacitance, and the board layout capacitance shown as C0-2). After LED0-0 turns off, SWPMOS0 is turned off and SWNMOS0 is turned on for LINE0, then LINE0 is pulled down to GND. Because there is a parastic capacitance between LINE0 and OUT0, OUT0 voltage is also pulled down to GND. After that, SWPMOS1 is turned on for next line (LINE1). When SWPMOS1 turns on, OUT0 voltage is pulled up from the ground voltage to VLED – VF. The charge current (ICHRG) flows to the parasitic capacitor (C0) through LED1-0, causing the LED to briefly turn on and creating the ghosting effect of LED1-0. The TLC5944 has an internal pre-charge FET to prevent ghosting. The power supply of the pre-charge FET must be connected to VLED (LED anode voltage). After a small delay after BLANK goes high, this FET pulls OUTn (OUT0 to OUT15) up to VLED. The charge current does not flow to C0 through LED1-0 when SWMOS1 is turned on and the ghosting is eliminated at (3). The pre-charge FET turns off as soon as BLANK goes low to avoid current flowing from VLED through the pre-charge FET. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Link(s): TLC5944 |
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