TVP70025IPZP datasheet(23/55 Pages) TI

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2C Host Interface

Reset and I

2C Bus Address Selection

2C Operation

TVP70025I

www.ti.com ...................................................................................................................................................................................................... SLES232 – JUNE 2008

Communication with the TVP70025I device is via an I2C host interface. The I2C standard consists of two signals,

serial input/output data (SDA) line and input clock line (SCL), which carry information between the devices

connected to the bus. A third signal (I2CA) is used for slave address selection. Although an I2C system can be

multi-mastered, the TVP70025I can function as a slave device only.

Since SDA and SCL are kept open drain at logic high output level or when the bus is not driven, the user should

connect SDA and SCL to a positive supply voltage via a pullup resistor on the board. SDA is implemented

bidirectional. The slave addresses select, terminal 73 (I2CA), enables the use of two TVP70025I devices tied to

the same I2C bus, as it controls the least significant bit of the I2C device address

Table 5. I2C Host Interface Terminal Description

SIGNAL

TYPE

DESCRIPTION

I2CA

Slave address selection

SCL

Input clock line

SDA

I/O

Input/output data line

The TVP70025I can respond to two possible chip addresses. The address selection is made at reset by an

externally supplied level on the I2CA pin. The TVP70025I device samples the level of terminal 73 at power up or

at the trailing edge of RESETB and configures the I2C bus address bit A0. The I2CA terminal has an internal

pulldown resistor to pull the terminal low to set a zero.

Table 6. I2C Host Interface Device Addresses

A0 (I2C A)

R/W

HEX

0 (default)

1/0

B9h/B8h

1(1)

1/0

BBh/BAh

(1)

If terminal 73 is strapped to IOVDD via a 2.2-k

Ω resistor, I2C device address A0 is set to 1.

Data transfers occur utilizing the following illustrated formats.

10111000

ACK

Subaddress

ACK

Send data

ACK

Read from I2C control registers

10111000

ACK

Subaddress

ACK

10111001

ACK

Receive data

NAK

S = I2C bus Start condition

P = I2C bus Stop condition

ACK = Acknowledge generated by the slave

NAK = Acknowledge generated by the master, for multiple byte read master with ACK each byte except last byte

Subaddress = Subaddress byte

Data = Data byte, if more than one byte of DATA is transmitted (read and write), the subaddress pointer is

automatically incremented

I2C bus address = Example shown that I2CA is in default mode; Write (B8h), Read (B9h).

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