| Electronic Components Datasheet Search |
|
M51996AP Datasheet(PDF) 20 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
M51996AP Datasheet(HTML) 20 Page - Renesas Technology Corp |
|
20 / 36 page ![]() M51996AP/AFP REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 20 of 35 OVP Circuit (Over Voltage Protection Circuit) Section OVP circuit is basically positive feedback circuit constructed by Q2, Q3 as shown in figure 13. Q2, Q3 turn on and the circuit operation of IC stops, when the input signal is applied to OVP terminal. (threshold voltage ≈ 750 mV) The current value of I2 is about 150 µA when the OVP does not operates but it decreases to about 2 µA when OVP operates. It is necessary to input the sufficient larger current (800 µA to 8 mA) than I2 for triggering the OVP operation. The reason to decrease I2 is that it is necessary that ICC at the OVP rest supply voltage is small. It is necessary that OVP state holds by circuit current from R1 in the application example, so this IC has the characteristic of small ICC at the OVP reset supply voltage (≈ stand-by current + 20 µA) On the other hand, the circuit current is large in the higher supply voltage, so the supply voltage of this IC doesn’t become so high by the voltage drop across R1. This characteristic is shown in figure 14. The OVP terminal input current in the voltage lower than the OVP threshold voltage is based on I2 and the input current in the voltage higher than the OVP threshold voltage is the sum of the current flowing to the base of Q3 and the current flowing from the collector of Q2 to the base. For holding in the latch state, it is necessary that the OVP terminal voltage is kept in the voltage higher than VBE of Q3. So if the capacitor is connected between the OVP terminal and GND, even though Q2 turns on in a moment by the surge voltage, etc, this latch action does not hold if the OVP terminal voltage does not become higher than VBE of Q3 by charging this capacitor. For resetting OVP state, it is necessary to make the OVP terminal voltage lower than the OVP L threshold voltage or make VCC lower than the OVP reset supply voltage. As the OVP reset voltage is settled on the rather high voltage of 9.0 V, SMPS can be reset in rather short time from the switch-off of the AC power source if the smoothing capacitor is not so large value. VCC OVP GND 8 k 12 k Q1 Q2 2.5 k 400 I2 7.8 V 100 µA I1 Q3 Note: I1 = 0 when OVP operates Figure 13 Detail Diagram of OVP Circuit |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |