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TDA9106A Datasheet(PDF) 21 Page - STMicroelectronics

Part # TDA9106A
Description  LOW COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
PDF  30 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

TDA9106A Datasheet(HTML) 21 Page - STMicroelectronics

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20k
220nF
13
From
Phase
Comparator
NOR1
A
6.5V
B
H-Lock CAP
37 HLOCKOUT
6V
5V
Figure 12 : LOCK/UNLOCK Block Diagram
OPERATING DESCRIPTION (continued)
function is described in Figure 12.
The NOR1 gate is receiving the phase comparator
output pulses (which also drive the charge pump).
When PLL1 is locked, on point A there is a very
small negative pulse (about 100ns) at each hori-
zontal cycle, so after RC filter, there is a high level
on Pin 13 which forces Hlockout to low level. Hys-
terisis comparator detects locking when Pin 13 is
reaching 6.5V and unlocking when Pin 13 is de-
creasing to 6.0V.
When PLL1 is unlocked, the 100ns negative pulse
on A becomes much larger and consequently the
average level on Pin 13 decreases. It forces Hlock-
out to go high.
The Pin 13 status is approximately the following :
- near 0V when there is no H-Sync
- between 0 and 4V with H-Sync frequency differ-
ent from VCO
- between 4 to 8 V when VCO frequency reaches
H-Sync one (but not already in phase)
- near 8V when PLL1 is locked.
H Osc
Sawtooth
H Drive
1.6V
4.0V
6.4V
7/8T
H
1/8T
H
Ts
Duty Cycle 48%
Internally
Shaped Flyback
Flyback
Figure 13 : PLL2 Timing Diagram
20k
Q1
GND 0V
6
HFLY
400
Figure 14 : Flyback Input Electrical Diagram
It is important to notice that Pin 13 is not an
output pin but is only used for filtering purpose
(see Figure 12 ).
The lock/unlock information is also available throw
I
2C read.
II.3 - PLL2
The PLL2 ensures a constant position of the
shaped flyback signal in comparion with the saw-
tooth of the VCO (Figure 13).
The phase comparator of PLL2 (phase type com-
parator) is followed by a charge pump with
± 0.5mA
(typ.) output current.
The flyback input is composed of an NPN transis-
tor. This input must be current driven. The maxi-
mum rec om ma nd ed input current is 2mA
(see Figure 14).
The duty cycle is fixed and equal to 48% of hori-
zontal-period.
Maximum storage time is about 43.75% - (Tfly/2.TH).
Typically, Tfly/TH is around20% thatmeansTs max is
around 33.75%.
II.4 - Output Section
The H-drive signal is transmitted to the output
througha shapingblock ensuringTs and dutycycle.
In order to secure scanning power part operation,
the output is inhibited in the following circum-
stances :
TDA9106A
21/30



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