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TPS62560DRVT Datasheet(PDF) 21 Page - Texas Instruments |
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TPS62560DRVT Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 29 page ![]() GND C OUT V OUT V IN U L R1 C1 TPS62560 TPS62561, TPS62562 www.ti.com ........................................................................................................................................... SLVS815B – JANUARY 2008 – REVISED NOVEMBER 2008 Figure 33. Suggested Layout for Adjustable-Output-Voltage Version As for all switching power supplies, the layout is an important step in the design. Proper function of the device demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If the layout is not carefully done, the regulator could show poor line and/or load regulation and stability issues, as well as EMI problems. It is critical to provide a low-inductance, low-impedance ground path. Therefore, use wide and short traces for the main current paths. The input capacitor, inductor, and output capacitor should be placed as close as possible to the IC terminals. Connect the GND terminal of the device to the thermal-pad land of the PCB and use this pad as a star point. Use a common power-GND node and a different node for the signal GND to minimize the effects of ground noise. Connect these ground nodes together to the thermal-pad land (star point) underneath the IC. Keep the common path to the GND terminal, which returns the small signal components and the high current of the output capacitors, as short as possible to avoid ground noise. The FB line should be connected directly to the output capacitor and routed away from noisy components and traces (e.g., the SW line). Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Link(s): TPS62560 TPS62561 TPS62562 |
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