TPS65950 datasheet(2/166 Pages) TI

2 / 166 page

Contents

TPS65950

Integrated Power Management/Audio Codec

SWCS032A – OCTOBER 2008 – REVISED DECEMBER 2008

www.ti.com

Introduction

....................................................................................................................... 13

1.1

Features

..................................................................................................................... 14

1.2

TPS65950 Block Diagram

................................................................................................. 15

Terminal Description

........................................................................................................... 17

2.1

Corner Balls

................................................................................................................. 17

2.2

Ball Characteristics

......................................................................................................... 18

2.3

Signal Description

.......................................................................................................... 23

Electrical Characteristics

..................................................................................................... 30

3.1

Absolute Maximum Ratings

............................................................................................... 30

3.2

Minimum Voltages and Associated Currents

........................................................................... 30

3.3

Recommended Operating Conditions

................................................................................... 31

3.4

Digital I/O Electrical Characteristics

..................................................................................... 31

Power Module

.................................................................................................................... 34

4.1

Power Providers

............................................................................................................ 36

4.1.1

VDD1 dc-dc Regulator

.......................................................................................... 37

4.1.1.1

VDD1 dc-dc Regulator Characteristics

............................................................ 37

4.1.1.2

External Components and Application Schematic

............................................... 39

4.1.2

VDD2 dc-dc Regulator

.......................................................................................... 40

4.1.2.1

VDD2 dc-dc Regulator Characteristics

............................................................ 40

4.1.2.2

External Components and Application Schematic

............................................... 42

4.1.3

VIO dc-dc Regulator

............................................................................................ 43

4.1.3.1

VIO dc-dc Regulator Characteristics

............................................................... 43

4.1.3.2

External Components and Application Schematic

............................................... 45

4.1.4

VDAC LDO Regulator

........................................................................................... 46

4.1.5

VPLL1 LDO Regulator

......................................................................................... 47

4.1.6

VPLL2 LDO Regulator

.......................................................................................... 48

4.1.7

VMMC1 LDO Regulator

........................................................................................ 49

4.1.8

VMMC2 LDO Regulator

........................................................................................ 50

4.1.9

VSIM LDO Regulator

............................................................................................ 51

4.1.10

VAUX1 LDO Regulator

......................................................................................... 52

4.1.11

VAUX2 LDO Regulator

......................................................................................... 53

4.1.12

VAUX3 LDO Regulator

......................................................................................... 54

4.1.13

VAUX4 LDO Regulator

......................................................................................... 55

4.1.14

Internal LDOs

.................................................................................................... 56

4.1.15

................................................................................................................. 56

4.1.16

USB LDO Short-Circuit Protection Scheme

.................................................................. 57

4.2

Power References

.......................................................................................................... 57

4.3

Power Control

............................................................................................................... 57

4.3.1

Backup Battery Charger

........................................................................................ 57

4.3.2

Battery Monitoring and Threshold Detection

................................................................. 58

4.3.2.1

Power On/Power Off and Backup Conditions

..................................................... 58

4.4

Power Consumption

....................................................................................................... 58

4.5

Power Management

........................................................................................................ 59

4.5.1

Boot Modes

....................................................................................................... 59

4.5.2

Process Modes

.................................................................................................. 59

4.5.2.1

C027.0 Mode

.......................................................................................... 60

4.5.2.2

C021.M Mode

......................................................................................... 60

4.5.3

Power-On Sequence

............................................................................................ 60

4.5.3.1

Timings Before Sequence_Start

.................................................................... 61

4.5.3.2

OMAP2 Power-On Sequence

....................................................................... 62

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