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6134AS–CASIC–08-Mar-05

ATC13 Summary

3.

Input/Output Pad Cell Libraries, IO12lib and IO33lib

The Atmel Input/Output Cell Library IO12lib contains a comprehensive list of input, out-

put, bi-directional and tristate cells. The ATC13 (1V) cell library includes a special set of

I/O cells, IO33lib, for interfacing with external 3.3V devices.

3.1

Voltage Levels

The IO12lib library is made up exclusively of low-voltage chip interface circuits powered

by a voltage level in the range of 1.1V to 1.32V. The library is compatible with SClib, 1.2-

volt standard cell library.

3.2

Power and Ground Pads

Designers are strongly encouraged to provide three kinds of power pairs for the IO12lib

library. These are “AC”, “DC” and core power pairs. AC power is used by the I/O to

switch its output from one state to the other. This switching generates noise in the AC

power buses on the chip. DC power is used by the I/O to maintain its output in a steady

state. The best noise performance is achieved when the DC power buses on the chip

are free of noise; you are encouraged to use separate power pairs for AC and DC power

to prevent most of the noise in the AC power buses from reaching the DC power buses.

You can use the same power pairs to supply both DC power to the I/Os and power to

the core without affecting noise performance.

Table 3-1.

VSS Power Pad Combinations

Core

Switching I/O

Quiet I/O

Library Cell Name

Signal Name

Vssi/gnd

VssAC

VssDC

•/ •

pv12i00

VSS

•

pv12a00

VSS

•

pv12d00

VSS

••

pv12e00

VSS

•/ •

•

pv12b00

VSS

•/ •

•

•

pv12f00

VSS

/•

pv12c00

VSS

Table 3-2.

VDD Power Pad Combinations

Core

Switching I/O

Quiet I/O

Library Cell Name

Signal Name

Vddi/vdd

VddAC

VddDC

•/ •

pv12i12

VDD

•

pv12a12

VDD

•

pv12d12

VDD

••

pv12e12

VDD

•/ •

•

pv12b12

VDD

•/ •

•

•

pv12f12

VDD

/•

pv12c12

VDD