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PCF2123TS Datasheet(PDF) 46 Page - NXP Semiconductors

Part # PCF2123TS
Description  SPI Real time clock/calendar
PDF  54 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF2123TS Datasheet(HTML) 46 Page - NXP Semiconductors

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PCF2123_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 19 November 2008
46 of 54
NXP Semiconductors
PCF2123
SPI Real time clock/calendar
15. Bare die outline
[1]
All coordinates are referenced in
µm to the center of the die (see Figure 31).
[2]
The substrate (rear side of the die) is wired to VSS but should not be electrically connected.
Fig 31. Bare die outline of PCF2123U/10
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
PCF2123U/10
Wire bond die; 12 bonding pads; 1.492 x 1.449 x 0.20 mm
PCF2123U/10
08-07-16
08-07-24
UNIT
mm
nom
0.20
1.492
1.296
0.09
0.081
0.09
A
DIMENSIONS (mm are the original dimensions)
D(1)
E(1)
1.449
eD
P1(2)
P2(3)
P3(2)
P4(3)
0.081
0
scale
1 mm
A
Notes
1. Dimension includes saw lane
2. P1 and P3: pad size
3. P2 and P4: passivation opening
P4 P3
P2
P1
detail X
D
E
eD
x
y
0
0
12
11
10
9
8
7
6
5
4
3
2
1
X
Table 46.
Bonding pad locations
Symbol
Pad
Coordinates[1]
x
y
SDO
1
648.0
−575.0
SDI
2
648.0
−377.0
SCL
3
648.0
−179.0
CLKOE
4
648.0
171.2
CLKOUT
5
648.0
369.2
VDD
6
648.0
625.7
OSCI
7
−648.0
639.0
OSCO
8
−648.0
421.9
TEST
9
−648.0
−25.9
INT
10
−648.0
−223.9
CE
11
−648.0
−441.0
VSS[2]
12
−648.0
−639.0
Alignment mark
693
−516.2



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