2

DS248F5

CS4334/5/8/9

Confidential Draft

3/11/08

TABLE OF CONTENTS

1. TYPICAL CONNECTION DIAGRAM .................................................................................................... 4

2. CHARACTERISTICS AND SPECIFICATIONS ..................................................................................... 5

SPECIFIED OPERATING CONDITIONS .............................................................................................. 5

ABSOLUTE MAXIMUM RATINGS ........................................................................................................5

ANALOG CHARACTERISTICS............................................................................................................. 6

POWER AND THERMAL CHARACTERISTICS ................................................................................... 8

DIGITAL INPUT CHARACTERISTICS .................................................................................................. 9

SWITCHING CHARACTERISTICS ..................................................................................................... 10

3. GENERAL DESCRIPTION ................................................................................................................. 12

3.1 Digital Interpolation Filter .............................................................................................................. 12

3.2 Delta-Sigma Modulator ................................................................................................................. 12

3.3 Switched-Capacitor DAC .............................................................................................................. 12

3.4 Analog Low-Pass Filter ................................................................................................................. 12

4. SYSTEM DESIGN ............................................................................................................................... 13

4.1 Master Clock ................................................................................................................................. 13

4.2 Serial Clock .................................................................................................................................. 13

4.2.1 External Serial Clock Mode ................................................................................................. 13

4.2.2 Internal Serial Clock Mode .................................................................................................. 13

4.3 De-Emphasis ................................................................................................................................ 14

4.4 Initialization and Power-Down ...................................................................................................... 14

4.5 Output Transient Control .............................................................................................................. 14

4.6 Grounding and Power Supply Decoupling .................................................................................... 15

4.7 Analog Output and Filtering .......................................................................................................... 15

4.8 Overall Base-Rate Frequency Response ..................................................................................... 18

4.9 Overall High-Rate Frequency Response ...................................................................................... 19

4.10 Base Rate Mode Performance Plots ..........................................................................................20

4.11 High Rate Mode Performance Plots ........................................................................................... 21

5. PARAMETER DEFINITIONS ............................................................................................................... 22

6. REFERENCES ..................................................................................................................................... 22

7. PACKAGE DIMENSIONS ................................................................................................................... 23

8. ORDERING INFORMATION ............................................................................................................... 24

9. FUNCTIONAL COMPATIBILITY ......................................................................................................... 24

10. REVISION HISTORY ......................................................................................................................... 24

LIST OF FIGURES

Figure 1.

Recommended Connection Diagram .........................................................................................4

Figure 2.

Output Test Load ....................................................................................................................... 8

Figure 3.

Maximum Loading...................................................................................................................... 9

Figure 4.

Power vs. Sample Rate ............................................................................................................. 9

Figure 5.

External Serial Mode Input Timing........................................................................................... 11

Figure 6.

Internal Serial Mode Input Timing ............................................................................................ 11

Figure 7.

Internal Serial Clock Generation ............................................................................................. 11

Figure 8.

System Block Diagram............................................................................................................. 12

Figure 9.

De-Emphasis Curve (Fs = 44.1kHz) ........................................................................................ 14

Figure 10. CS4334 Data Format (I²S) ....................................................................................................... 15

Figure 11. CS4335 Data Format ............................................................................................................... 15

Figure 12. CS4338 Data Format ............................................................................................................... 16

Figure 13. CS4339 Data Format ............................................................................................................... 16

Figure 14. CS4334/5/8/9 Initialization and Power-Down Sequence ......................................................... 17

Figure 15. Stopband Rejection.................................................................................................................. 18

Figure 16. Transition Band........................................................................................................................ 18

Figure 17. Transition Band........................................................................................................................ 18