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CS5346 Datasheet(PDF) 16 Page - Cirrus Logic |
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CS5346 Datasheet(HTML) 16 Page - Cirrus Logic |
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16 / 40 page ![]() 16 DS861PP1 CS5346 SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT Logic ‘0’ = DGND = AGND = 0 V; Logic ‘1’ = VLS, CL = 20 pF. (Note 16) 16. See Figure 1 and Figure 2 on page 17. Parameter Symbol Min Typ Max Unit Sample Rate Single-Speed Mode Double-Speed Mode Quad-Speed Mode Fs Fs Fs 8 50 100 - - - 50 100 200 kHz kHz kHz MCLK Specifications MCLK Frequency fmclk 2.048 - 51.200 MHz MCLK Input Pulse Width High/Low tclkhl 8- - ns Master Mode LRCK Duty Cycle - 50 - % SCLK Duty Cycle - 50 - % SCLK falling to LRCK edge tslr -10 - 10 ns SCLK falling to SDOUT valid tsdo 0- 36 ns Slave Mode LRCK Duty Cycle 40 50 60 % SCLK Period Single-Speed Mode Double-Speed Mode Quad-Speed Mode tsclkw tsclkw tsclkw - - - - - - ns ns ns SCLK Pulse Width High tsclkh 30 - - ns SCLK Pulse Width Low tsclkl 48 - - ns SCLK falling to LRCK edge tslr -10 - 10 ns SCLK falling to SDOUT valid tsdo 0- 36 ns 10 9 128 ()Fs --------------------- 10 9 64 ()Fs ------------------ 10 9 64 ()Fs ------------------ |
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