7

3039K–CNFG–2/08

AT17F040/080

5.9

A2(1)

Device selection input, (when SER_EN Low). The input is used to enable (or chip select) the

device during programming (i.e., when SER_EN is Low). Refer to the AT17F Programming

Specification available on the Atmel web site for additional details.

5.10

READY

Open collector reset state indicator. Driven Low during power-up reset, released when power-up

is complete. (recommended 4.7 k

Ω pull-up on this pin if used).

5.11

SER_EN(1)

The serial enable input must remain High during FPGA configuration operations. Bringing

SER_EN Low enables the 2-Wire Serial Programming Mode. For non-ISP applications,

SER_EN should be tied to V

5.12

V

CC

+3.3V (±10%).

Notes:

1. This pin has an internal 20 k

Ω pull-up resistor.

2. This pin has an internal 30 k

Ω pull-down resistor.