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AT40KAL Datasheet(PDF) 6 Page - ATMEL Corporation

Part # AT40KAL
Description  Military Reprogrammable FPGAs with FreeRAM
PDF  38 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT40KAL Datasheet(HTML) 6 Page - ATMEL Corporation

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6
AT40KAL
4263B–AERO–06/03
The Busing Network
Figure 3 on page 7 depicts one of five identical busing planes. Each plane has three bus
resources: a local-bus resource (the middle bus) and two express-bus (both sides)
resources. Bus resources are connected via repeaters. Each repeater has connections
to two adjacent local-bus segments and two express-bus segments. Each local-bus
segment spans four cells and connects to consecutive repeaters. Each express-bus
segment spans eight cells and “leapfrogs” or bypasses a repeater. Repeaters regener-
ate signals and can connect any bus to any other bus (all pathways are legal) on the
same plane. Although not shown, a local bus can bypass a repeater via a programma-
ble pass gate allowing long on-chip tri-state buses to be created. Local/Local turns are
implemented through pass gates in the cell-bus interface (see following page).
Express/Express turns are implemented through separate pass gates distributed
throughout the array.
Some of the bus resource on the AT40KAL is used as a dual-function resource. Table 2
shows which buses are used in a dual-function mode and which bus plane is used. The
AT40KAL software tools are designed to accommodate dual-function buses in an effi-
cient manner.
Table 2. Dual-function Buses
Function
Type
Plane(s)
Direction
Comments
Cell Output Enable
Local
5
Horizontal and
Vertical
RAM Output Enable
Express
2
Vertical
Bus full length at array edge
Bus in first column to left of RAM block
RAM Write Enable
Express
1
Vertical
Bus full length at array edge
Bus in first column to left of RAM block
RAM Address
Express
1 - 5
Vertical
Buses full length at array edge
Buses in second column to left of RAM block
RAM Data In
Local
1
Horizontal
RAM Data Out
Local
2
Horizontal
Clocking
Express
4
Vertical
Bus half length at array edge
Set/Reset
Express
5
Vertical
Bus half length at array edge



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