ATAR090 datasheet(49/75 Pages) ATMEL

49 / 75 page

ATAR090/ATAR890

4696D–4BMCU–12/04

Serial Interface Registers

Serial Interface Control Register

1 (SIC1)

•

In transmit mode (SDD = 1) shifting starts only if the transmit buffer has been loaded

(SRDY = 1).

•

Setting SIR-bit loads the contents of the shift register into the receive buffer

(synchronous 8-bit mode only).

•

In MCL modes, writing a 0 to SIR generates a start condition and writing a 1

generates a stop condition.

Serial Interface Control Register

2 (SIC2)

Auxiliary register address: '9'hex

Bit 3Bit 2Bit 1Bit 0

SIC1

SIR

SCD

SCS1

SCS0

Reset value: 1111b

SIR

Serial Interface Reset

SIR = 1, SSI inactive

SIR = 0, SSI active

SCD

Serial Clock Direction

SCD = 1, SC line used as output

SCD = 0, SC line used as input

Note: This bit has to be set to '1' during the MCL mode

SCS1

Serial Clock source Select bit 1

SCS0

Serial Clock source Select bit 0

Note:

With SCD = '0' the bits SCS1 and SCS0 are insignificant

Table 21. Serial Clock Source Select Bits

SCS1

SCS0

Internal Clock for SSI

SYSCL/2

T1OUT/2

POUT/2

TOG2/2

Auxiliary register address: ’A’hex

Bit 3Bit 2Bit 1Bit 0

SIC2

MSM

SM1

SM0

SDD

Reset value: 1111b

MSM

Modular Stop Mode

MSM = 1, modulator stop mode disabled (output masking off)

MSM = 0, modulator stop mode enabled (output masking on) - used in modulation

modes for generating bit-streams which are not sub-multiples of 8 bits.

SM1

Serial Mode control bit 1

SM0

Serial Mode control bit 0

ATAR090 Datasheet(PDF) 49 Page - ATMEL Corporation

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