| Electronic Components Datasheet Search |
|
F75121RG Datasheet(PDF) 39 Page - Feature Integration Technology Inc. |
|
|
|||||||||||||||||||||||||||||
F75121RG Datasheet(HTML) 39 Page - Feature Integration Technology Inc. |
|
39 / 45 page ![]() - 37 - July, 2007 V0.24P to generate IRQ or SMI#. 7.54 Output Driving Enable – Index 0x4C Power-on default [7:0] =0000_0000b Bit Name R/W PWR Description 7-4 Reserved RO VSB3V Read back will be zero 3 DB_TIME33_SEL R/W VSB3V Select GPIO33 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). 2 DB_TIME32_SEL R/W VSB3V Select GPIO32 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). 1 DB_TIME31_SEL R/W VSB3V Select GPIO31 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). 0 DB_TIME30_SEL R/W VSB3V Select GPIO30 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). 7.55 CHIPID(1) Register – Index 5Ah Power-on default [7:0] =0000_0011b Bit Name R/W PWR Description 7-0 CHIPID RO VSB3V Chip ID, High byte (8’h03). 7.56 CHIPID(2) Register – Index 5Bh Power-on default [7:0] =0000_0001b Bit Name R/W PWR Description 7-0 CHIPID RO VSB3V Chip ID, Low byte (8’h01). |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |