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STS-100 Datasheet(PDF) 4 Page - Connor-Winfield Corporation |
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STS-100 Datasheet(HTML) 4 Page - Connor-Winfield Corporation |
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4 / 8 page ![]() Data Sheet #: TM026 Page 4 of 8 Rev: P03 Date: 4/25/06 © Copyright 2006 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Connector S1 Table 5 PIN SYMBOL I/O DESCRIPTION 1,3,5,7, A[0:6] I Address bus for microprocessor interface, A[0} is SDI in serial interface mode 9,11,13 2 CSB I Chip Select (Active Low) 4 WRB I Write (Active Low) 6 RDB I Read (Active Low) 8 ALE I Address latch enable. This pin acts as SCLK in serial mode. 10 RDY O Ready/Data acknowledge 14 PORB I Power on Reset (Active Low) 17,19,21 23,25,27 AD[0:7] Address/Data multiplexed address/data depending on microprocessor mode 29,31 selection. AD[0] is SDO in serial mode 16 MSTSLVB I Master/Slave select. Sets initial power up state 18 INTRPT O Active high software interrupt 20 SRCSW I Source switching. Force fast source switching. 22 SONSDHB I SONET/SDH frequency select. Sets initial power up state 35, 37, 39 UPSEL[0:2] I Configures the input for a particular microprocessor type. 41 TRST I Tri-State input 43 TCK I JTAG TCK input 45 TDO O JTAG TDO output 47 TDI I JTAG TDI input 49 TMS I JTAG TMS output 53, 54, Vcc 3.3V Input 55, 56 61, 62, GND Ground 63, 64 12, 15, 24, 26, 28, 30, 32, 33, 34, 36, 38, 40, NC No Connect 42, 44, 46, 48, 50, 51, 52, 57, 58, 59, 60 |
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