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HV9113 Datasheet(PDF) 6 Page - Supertex, Inc |
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HV9113 Datasheet(HTML) 6 Page - Supertex, Inc |
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6 / 7 page ![]() 6 + – Reference V 1 V 2 0.1V swept 10Hz – 1MHz 0.1 µF 10.0V 4.00V 100K1% 100K1% PSRR Test Circuits Detailed Description Preregulator The preregulator/startup circuit for the HV911X consists of a high- voltage n-channel depletion-mode DMOS transistor driven by an error amplifier to form a variable current path between the V IN terminal and the V DD terminal. Maximum current (about 20 mA) occurs when V DD = 0, with current reducing as VDD rises. This path shuts off altogether when V DD rises to somewhere between 7.8 and 9.4V, so that if V DD is held at 10 or 12V by an external source (generally the supply the chip is controlling). No current other than leakage is drawn through the high voltage transistor. This mini- mizes dissipation. An external capacitor between V DD and VSS is generally required to store energy used by the chip in the time between shutoff of the high voltage path and the VDD supply’s output rising enough to take over powering the chip. This capacitor should have a value of 100X or more the effective gate capacitance of the MOSFET being driven, i.e., C storage ≥ 100 x (gate charge of FET at 10V ÷ 10V) as well as very good high frequency characteristics. Stacked polyester or ceramic caps work well. Electrolytic capacitors are generally not suitable. A common resistor divider string is used to monitor V DD for both the undervoltage lockout circuit and the shutoff circuit of the high voltage FET. Setting the undervoltage sense point about 0.6V lower on the string than the FET shutoff point guarantees that the undervoltage lockout always releases before the FET shuts off. Bias Circuit An external bias resistor, connected between the bias pin and VSS is required by the HV911X to set currents in a series of current mirrors used by the analog sections of the chip. Nominal external bias current requirement is 15 to 20 µA, which can be set by a 390K Ω to 510KΩ resistor if a 10V V DD is used, or a 510kΩ to 680K Ω resistor if V DD will be 12V. A precision resistor is not required; ± 5% is fine. Clock Oscillator The clock oscillator of the HV911X consists of a ring of CMOS inverters, timing capacitors, a capacitor discharge FET, and, in the 50% maximum duty cycle versions, a frequency dividing flip- flop. A single external resistor between the OSC In and OSC Out pins is required to set oscillator frequency (see graph). For the 50% maximum duty cycle versions the Discharge pin is internally connected to GND. For the 99% duty cycle version, the discharge pin can either be connected to V SS directly or connected to VSS through a resistor used to set a deadtime. One difference exists between the Supertex HV911X and com- petitive 911X’s: On the Supertex part the oscillator is shut off when a shutoff command is received. This saves about 150 µA of quiescent current, which aids in the construction of power sup- plies to meet CCITT specification I-430, and in other situations where an absolute minimum of quiescent power dissipation is required. Reference The Reference of the HV911X consists of a stable bandgap reference followed by a buffer amplifier which scales the voltage up to approximately 4.0V. The scaling resistors of the reference buffer amplifier are trimmed during manufacture so that the output of the error amplifier when connected in a gain of –1 configuration is as close to 4.000V as possible. This nulls out any input offset of the error amplifier. As a consequence, even though the ob- served reference voltage of a specific part may not be exactly 4.0V, the feedback voltage required for proper regulation will be. A ≈50KΩ resistor is placed internally between the output of the reference buffer amplifier and the circuitry it feeds (reference output pin and non-inverting input to the error amplifier). This allows overriding the internal reference with a low-impedance voltage source ≤6.0V. Using an external reference reinstates the input offset voltage of the error amplifier, and its effect of the exact value of feedback voltage required. Because the reference of the 911X is a high impedance node, and usually there will be significant electrical noise near it, a bypass capacitor between the reference pin and V SS is strongly recom- mended. The reference buffer amplifier is intentionally compen- sated to be stable with a capacitive load of 0.01 to 0.1 µF. + – Reference V 1 V 2 60.4K 40.2K 1.0V swept 100Hz – 2.2MHz Tektronix P6021 (1 turn secondary) 0.1 µF +10V (V DD) GND (–V IN) (FB) NOTE: Set Feedback Voltage so that V COMP = VDIVIDE ± 1mV before connecting transformer Error Amp Z OUT HV9110/HV9112/HV9113 |
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