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LT1763 Series

1763fe

Figure 6. Noise Resulting from

Tapping on a Ceramic Capacitor

Y5V and Z5U capacitors, but can still be signiﬁcant enough

to drop capacitor values below appropriate levels. Capacitor

DC bias characteristics tend to improve as component

case size increases, but expected capacitance at operating

voltage should be veriﬁed.

Voltage and temperature coefﬁcients are not the only

sources of problems. Some ceramic capacitors have a

piezoelectric response. A piezoelectric device generates

voltage across its terminals due to mechanical stress,

similar to the way a piezoelectric accelerometer or

microphone works. For a ceramic capacitor, the stress

can be induced by vibrations in the system or thermal

transients. The resulting voltages produced can cause

appreciable amounts of noise, especially when a ceramic

capacitor is used for noise bypassing. A ceramic capacitor

produced Figure 6’s trace in response to light tapping from a

pencil. Similar vibration induced behavior can masquerade

as increased output voltage noise.

Thermal Considerations

The power handling capability of the device will be limited

by the maximum rated junction temperature (125°C). The

power dissipated by the device will be made up of two

components:

1. Output current multiplied by the input/output voltage

differential: (IOUT)(VIN – VOUT), and

2. GND pin current multiplied by the input voltage:

(IGND)(VIN).

The GND pin current can be found by examining the GND

Pin Current curves in the Typical Performance Character-

istics section. Power dissipation will be equal to the sum

of the two components listed above.

The LT1763 series regulators have internal thermal limiting

designed to protect the device during overload conditions.

For continuous normal conditions, the maximum junction

temperature rating of 125°C must not be exceeded. It is

important to give careful consideration to all sources of

thermal resistance from junction-to-ambient. Additional

heat sources mounted nearby must also be considered.

For surface mount devices, heat sinking is accomplished

by using the heat spreading capabilities of the PC board

and its copper traces. Copper board stiffeners and plated

through-holes can also be used to spread the heat gener-

ated by power devices.

The following tables list thermal resistance for several

different board sizes and copper areas. All measurements

were taken in still air on 3/32" FR-4 board with one ounce

copper.

Table 1. DE Package, 12-Lead DFN

COPPER AREA

BOARD AREA

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)

TOPSIDE*

BACKSIDE

2500mm2

40°C/W

1000mm2

2500mm2

45°C/W

225mm2

2500mm2

50°C/W

100mm2

2500mm2

60°C/W

* Device is mounted on topside

APPLICATIONS INFORMATION

100ms/DIV

VOUT

500μV/DIV

1763 F06

LT1763-5

COUT = 10μF

CBYP = 0.01μF

ILOAD = 100mA

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