5-6

TELCOM SEMICONDUCTOR, INC.

so the time between toggles is less than one watchdog

timeout period. The strobe signal can be derived from

microprocessor address, data and/or control signals. Typi-

cal circuit examples are shown in Figure 4.

Resistor Value Selection

The values of R1 and R2 must be chosen to ensure a

line is low. The use of 10k

Ω, ±5% tolerance resistors are

recommended. These values result in a nominal strobe level

5.0V

±10%). Other resistor values can be used, so long as

the additive tolerances of the power supply and resistor

all additive tolerance conditions.

External Override Reset Control

A built-in debounce circuit allows a push-button switch

(PB) or other electronic signal to be wire-ORed to this pin as

an external RESET override control. The external

RESET is required to be an active low signal. Internally, this

input is timed to provide a minimum RESET pulse width of

500msec. Reference Figure 2.

Supply Monitor Noise Sensitivity

The TC32M is optimized for fast response to negative-

may require a 0.01

µF bypass capacitor to reduce detection

sensitivity. This capacitor should be installed as close to the

TC32M as possible to keep the capacitor lead length short.

DETAILED DESCRIPTION

The TC32M provides three important functions to safe-

guard stable processor operation: precision processor moni-

tor, watchdog sanity timer and external override reset

control.

Processor Monitor

below the nominal threshold voltage. As a result, this pin is

LOW when power is initially applied, holding the processor

in its reset state. RS remains low for a minimum of 500msec

processor to stabilize.

Watchdog Timer

The processor drives the RS pin with an input/output

Pulling the bottom resistor of this divider low results in an

internal voltage change (

strobe) sufficient to reset the watch-

RESET pin. The processor must continuously apply strobes

in this manner within a set period to verify proper software

execution. A momentary reset (500msec minimum) is gen-

erated by the TC32M if a hardware or software failure keeps

RS from being strobed within the watchdog timeout period.

This action typically initiates the processor's power-up rou-

tine. If the interruption persists, new reset pulses are gener-

ated each timeout period until RS is strobed. This timeout

period is typically 700msec.

The software routine that drives the RS strobe must be

in a section of the program that executes frequently enough

5V

5V

RESET

PO.1

RESET

MICRO-

CONTROLLER

MICRO-

PROCESSOR

R2,10k

MICROCONTROLLER EXAMPLE

RESET

DECODER

ADDRESS

RESET

R1, 10k

MICROPROCESSOR EXAMPLE

RS

TC32M

RS

TC32M

R1, 10k

R2, 10k

TC32M

ECONOMONITOR™ – 3-PIN SYSTEM SUPERVISOR

WITH POWER SUPPLY MONITOR AND WATCHDOG