LTC1400CS8 datasheet(4/20 Pages) LINER

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LTC1400

1400fa

DIGITAL I PUTS A D DIGITAL OUTPUTS The

●

denotes the speciﬁcations which apply over the

full operating temperature range, otherwise speciﬁcations are at TA = 25°C unless otherwise noted. (Note 5)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

VOL

Low Level Output Voltage

VCC = 4.75V, IO = 160μA

VCC = 4.75V, IO = 1.6mA

●

0.05

0.10

0.4

IOZ

Hi-Z Output Leakage DOUT

VOUT = 0V to VCC

●

±10

μA

COZ

Hi-Z Output Capacitance DOUT (Note 7)

ISOURCE

Output Source Current

VOUT = 0V

–10

ISINK

Output Sink Current

VOUT = VCC

TI I G CHARACTERISTICS The

●

denotes the speciﬁcations which apply over the full operating temperature

range, otherwise speciﬁcations are at TA = 25°C unless otherwise noted. (Note 5)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

fSAMPLE(MAX) Maximum Sampling Frequency

(Note 6)

●

400

kHz

tCONV

Conversion Time

fCLK = 6.4MHz

●

2.1

μs

tACQ

Acquisition Time

(Unipolar Mode)

(Bipolar Mode VSS = –5V)

(Note 7)

●

230

200

300

270

fCLK

CLK Frequency

●

0.1

6.4

MHz

tCLK

CLK Pulse Width

(Notes 7, 12)

●

tWK(NAP)

Time to Wake Up from Nap Mode

(Note 7)

350

CLK Pulse Width to Return to Active Mode

●

CONV↑ to CLK↑ Setup Time

●

CONV↑ After Leading CLK↑

●

CONV Pulse Width

(Note 11)

●

Time from CLK↑ to Sample Mode

(Note 7)

Aperture Delay of Sample-and-Hold

Jitter < 50ps (Note 7)

●

Minimum Delay Between Conversion

(Unipolar Mode)

(Bipolar Mode VSS = –5V)

●

265

235

385

355

Delay Time, CLK↑ to DOUT Valid

CLOAD = 20pF

●

Delay Time, CLK↑ to DOUT Hi-Z

CLOAD = 20pF

●

t10

Time from Previous Data Remains Valid After CLK↑

CLOAD = 20pF

●

t11

Minimum Time between Nap/Sleep Request to Wake Up Request

(Notes 7, 12)

●

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All voltage values are with respect to GND.

Note 3: When these pin voltages are taken below VSS (ground for unipolar

mode) or above VCC, they will be clamped by internal diodes. This product

can handle input currents greater than 40mA below VSS (ground for

unipolar mode) or above VCC without latch-up.

Note 4: When these pin voltages are taken below VSS (ground for unipolar

mode), they will be clamped by internal diodes. This product can handle

input currents greater than 40mA below VSS (ground for unipolar mode)

without latch-up. These pins are not clamped to VCC.

Note 5: VCC = 5V, fSAMPLE = 400kHz, tr = tf = 5ns unless otherwise

speciﬁed.

Note 6: Recommended operating conditions.

Note 7: Guaranteed by design, not subject to test.

Note 8: Linearity, offset and full-scale speciﬁcations apply for unipolar and

bipolar modes.

Note 9: Integral nonlinearity is deﬁned as the deviation of a code from a

straight line passing through the actual endpoints of the transfer curve.

The deviation is measured from the center of the quantization band.

Note 10: Bipolar offset is the offset voltage measured from –0.5LSB when

the output code ﬂickers between 0000 0000 0000 and 1111 1111 1111.

Note 11: The rising edge of CONV starts a conversion. If CONV returns

low at a bit decision point during the conversion, it can create small errors.

For best performance ensure that CONV returns low either within 120ns

after conversion starts (i.e., before the ﬁrst bit decision) or after the 14

clock cycle. (Figure 13 Timing Diagram).

Note 12: If this timing speciﬁcation is not met, the device may not respond

to a request for a conversion. To recover from this condition a NAP

request is required.

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