LTC4352 datasheet(12/16 Pages) LINER

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LTC4352

4352f

Figure 8. Recommended PCB Layout for Power MOSFET

DRAWING IS NOT TO SCALE!

VIA TO GROUND PLANE

LTC4352

MSOP-12

VIA TO GROUND PLANE

CURRENT FLOW

TRACK WIDTH W:

0.03˝ PER AMPERE

ON 1OZ CU FOIL

FROM INPUT

SUPPLY

TO LOAD

SO-8

4352 F08

APPLICATIONS INFORMATION

LEDs, D1 and D2, require around 3mA for good luminous

intensity. Accounting for a 2V diode drop and 0.5V VOL,

R1 and R2 are set to 2.7k.

PCB Layout Considerations

Connect the VIN and OUT pin traces as close as possible to

the MOSFET’s terminals. Keep the traces to the MOSFET

wide and short to minimize resistive losses. The PCB

traces associated with the power path through the MOSFET

should have low resistance. See Figure 8.

It is also important to put C1, the bypass capacitor for

the VCC pin, as close as possible between VCC and GND.

Also place C2 near the CPO and SOURCE pins. Surge

suppressors, when used, should be mounted close to the

LTC4352 using short lead lengths.

LTC4352 Datasheet(PDF) 12 Page - Linear Technology