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LTC5507 Datasheet(PDF) 4 Page - Linear Technology |
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LTC5507 Datasheet(HTML) 4 Page - Linear Technology |
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4 / 8 page ![]() LTC5507 4 5507f BLOCK DIAGRA – + – + 5507 BD GAIN COMPRESSION SHDN VOUT SHDN GND C1 C2 2 1 3 4 BUFFER 250 Ω RF DET 30k 30k 60 µA60µA 150k BIAS 100 Ω RFSOURCE RFIN VCC 6 5 VCC PCAP C1 = C2 C2 ( µF) ≥ , f = LOWEST RF INPUT FREQUENCY (MHz) 1 30f PI FU CTIO S SHDN (Pin 1): Shutdown Input. A logic low or no-connect on the SHDN pin places the part in shutdown mode. A logic high enables the part. SHDN has an internal 150k pull down resistor to ensure that the part is in shutdown when the enable driver is in a tri-state condition. GND (Pin 2): System Ground. VOUT (Pin 3): Buffered and Level Shifted Detector Output Voltage. VCC (Pin 4): Power Supply Voltage, 2.7V to 6V. VCC should be bypassed with 0.1 µF and 100pF ceramic capacitors. PCAP (Pin 5): Peak Detector Hold Capacitor. Capacitor value is dependent on RF frequency. Capacitor must be connected between PCAP and VCC. RFIN (Pin 6): RF Input Voltage. Referenced to VCC. A coupling capacitor must be used to connect to the RF signal source. This pin has an internal 250 Ω termination and an internal Schottky diode detector. Figure 2. |
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