LTC6404 datasheet(26/28 Pages) LINER

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LTC6404

6404f

APPLICATIONS INFORMATION

Figure 11. Interfacing the LTC6404-1 to a High Speed 105Msps ADC

other external sources of noise from being converted to

differential noise due to divider mismatches in the feedback

networks. It is also recommended that the resistive feed-

back networks be comprised of 1% resistors (or better)

to enhance the output common mode rejection. This will

also prevent VOCM referred common mode noise of the

common mode ampliﬁer path (which cannot be ﬁltered)

from being converted to differential noise, degrading the

differential noise performance.

Feedback factor mismatch has a weak effect on distortion.

Using 1% or better resistors should prevent mismatch

from impacting ampliﬁer linearity. However, in single

supply level shifting applications where there is a voltage

difference between the input common mode voltage and

the output common mode voltage, resistor mismatch can

make the apparent voltage offset of the ampliﬁer appear

worse than speciﬁed.

In general, the apparent input referred offset induced by

feedback factor mismatch is given by the equation:

VOSDIFF(APPARENT) ≈ (VINCM – VOCM) • Δβ

where

Δβ =

–

Interfacing the LTC6404 to A/D Converters

The LTC6404’s rail-to-rail output and fast settling time make

the LTC6404 ideal for interfacing to low voltage, single

supply, differential input ADCs. The sampling process of

ADCs create a sampling glitch caused by switching in the

sampling capacitor on the ADC front end which momentarily

“shorts” the output of the ampliﬁer as charge is transferred

between the ampliﬁer and the sampling cap. The ampliﬁer

must recover and settle from this load transient before

this acquisition period ends for a valid representation of

the input signal. In general, the LTC6404 will settle much

more quickly from these periodic load impulses than

from a 2V input step, but it is a good idea to either use

the ﬁltered outputs to drive the ADC (Figure 11 shows an

example of this), or to place a discrete R-C ﬁlter network

between the differential unﬁltered outputs of the LTC6404

and the input of the ADC to help absorb the charge transfer

required during the ADC sampling process. The capaci-

tance of the ﬁlter network serves as a charge reservoir

to provide high frequency charging during the sampling

process, while the two resistors of the ﬁlter network are

used to dampen and attenuate any charge kickback from

the ADC. The selection of the R-C time constant is trial

and error for a given ADC, but the following guidelines

are recommended: Choosing too large of a resistor in the

decoupling network (leaving insufﬁcient settling time)

–

SHDN

IN–

OUT+

OUTF+

IN+

OUT–

OUTF–

AIN+

AIN–

100Ω

V+

V–

V+

V–

3.3V

VOCM

V–

V+

V–

6404 F11

LTC6404-1

LTC2207

VIN

2VP-P

SHDN

100Ω

0.1μF

3.3V

0.1μF

CONTROL

GND

VDD

D15

•

0.1μF

VCM

2.2μF

3.3V

1μF

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