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LTM4601/LTM4601-1

4601f

PI FU CTIO S (See Package Description for Pin Assignment)

VIN (Bank 1): Power Input Pins. Apply input voltage be-

tween these pins and PGND pins. Recommend placing

input decoupling capacitance directly between VIN pins

and PGND pins.

VOUT (Bank 3): Power Output Pins. Apply output load

between these pins and PGND pins. Recommend placing

output decoupling capacitance directly between these pins

and PGND pins. Review the ﬁgure below.

PGND (Bank 2): Power ground pins for both input and

output returns.

VOSNS

– (PinM12):(–)InputtotheRemoteSenseAmpliﬁer.

This pin connects to the ground remote sense point. The

remote sense ampliﬁer is used for VOUT ≤3.3V.

NC1 (Pin M12): No Connect On the LTM4601-1.

VOSNS

+ (Pin J12): (+) Input to the Remote Sense Ampliﬁer.

This pin connects to the output remote sense point. The

remote sense ampliﬁer is used for VOUT ≤3.3V.

NC2 (Pin J12): No Connect On the LTM4601-1.

DIFFVOUT (Pin K12): Output of the Remote Sense Ampli-

ﬁer. This pin connects to the VOUT_LCL pin.

NC3 (Pin K12): No Connect On the LTM4601-1.

DRVCC (Pin E12): This pin normally connects to INTVCC

for powering the internal MOSFET drivers. This pin can

be biased up to 6V from an external supply with about

50mA capability, or an external circuit shown in Figure 16.

This improves efﬁciency at the higher input voltages by

reducing power dissipation in the module.

INTVCC (Pin A7): This pin is for additional decoupling of

the 5V internal regulator.

PLLIN (Pin A8): External Clock Synchronization Input to

the Phase Detector. This pin is internally terminated to

SGND with a 50k resistor. Apply a clock above 2V and

below INTVCC. See Applications Information.

TRACK/SS (Pin A9): Output Voltage Tracking and Soft-

Start Pin. When the module is conﬁgured as a master

output, then a soft-start capacitor is placed on this pin

to ground to control the master ramp rate. A soft-start

capacitor can be used for soft-start turn on as a stand

alone regulator. Slave operation is performed by putting

a resistor divider from the master output to the ground,

and connecting the center point of the divider to this pin.

See Applications Information.

MPGM (Pin A12): Programmable Margining Input. A re-

sistor from this pin to ground sets a current that is equal

to 1.18V/R. This current multiplied by 10k

Ω will equal a

value in millivolts that is a percentage of the 0.6V refer-

ence voltage. See Applications Information. To parallel

LTM4601s, each requires an individual MPGM resistor.

Do not tie MPGM pins together.

fSET (Pin B12): Frequency Set Internally to 850kHz. An

external resistor can be placed from this pin to ground

to increase frequency. This pin can be decoupled with a

1000pF capacitor. See Applications Information for fre-

quency adjustment.

VFB (Pin F12): The Negative Input of the Error Ampliﬁer.

Internally, this pin is connected to VOUT_LCL pin with a

60.4k precision resistor. Different output voltages can be

programmed with an additional resistor between VFB and

SGND pins. See Applications Information.

MARG1

DRVCC

VFB

PGOOD

SGND

VOSNS

+/NC2*

DIFFVOUT/NC3*

VOUT_LCL

VOSNS

–/NC1*

VIN

BANK 1

PGND

BANK 2

VOUT

BANK 3

fSET

MARG0

1234567

*LTM4601-1 ONLY

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