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LTM4612

4612f

APPLICATIONS INFORMATION

COMP Pin

The pin is the external compensation pin. The module

has already been internally compensated for most output

voltages. An Excel design tool from Linear Technology will

be provided for more control loop optimization.

FCB Pin

The FCB pin determines whether the bottom MOSFET

remains on when current reverses in the inductor. Tying

this pin above its 0.6V threshold enables discontinuous

operation where the bottom MOSFET turns off when in-

ductor current reverses. FCB pin below the 0.6V threshold

forces continuous synchronous operation, allowing current

to reverse at light loads and maintaining high frequency

operation.

PLLIN Pin

The power module has a phase-locked loop comprised

of an internal voltage controlled oscillator and a phase

detector. This allows the internal top MOSFET turn-on

to be locked to the rising edge of the external clock.

The frequency range is ±30% around the set operating

frequency. A pulse detection circuit is used to detect a

clock on the PLLIN pin to turn on the phase-locked loop.

The pulse width of the clock has to be at least 400ns, and

2V in amplitude. During the start-up of the regulator, the

phase-locked loop function is disabled.

INTVCC and DRVCC Connection

An internal low dropout regulator produces an internal

5V supply that powers the control circuitry and DRVCC

for driving the internal power MOSFETs. Therefore, if

the system does not have a 5V power rail, the LTM4612

can be directly powered by VIN. The gate driver current

through the LDO is about 20mA. The internal LDO power

dissipation can be calculated as:

PLDO_LOSS = 20mA • (VIN – 5V)

The LTM4612 also provides the external gate driver voltage

pin DRVCC. If there is a 5V rail in the system, it is recom-

mended to connect the DRVCC pin to the external 5V rail.

This is especially true for higher input voltages. Do not

apply more than 6V to the DRVCC pin.

Parallel Operation

The LTM4612 device is an inherently current mode con-

trolled device. This allows the paralleled modules to have

very good current sharing and balanced thermal on the

design. Figure 21 shows a schematic of the parallel design.

The voltage feedback equation changes with the variable

N as modules are paralleled. The equation:

OUT

100

N is the number of paralleled modules.

Radiated EMI Noise

High radiated EMI noise is a disadvantage for switching

regulators by nature. Fast switching turn-on and turn-off

make the large di/dt change in the converters, which act

as the radiation sources in most systems. LTM4612 inte-

grates the feature to minimize the radiated EMI noise to

meet the most applications with low noise requirements.

An optimized gate driver for the MOSFET and a noise

cancellation network are installed inside the LTM4612

to achieve the low radiated EMI noise. Figure 8 shows a

typical example for the LTM4612 to meet the Class B of

CISPR 22 radiated emission limit.

Figure 8. Radiated Emission Scan with 24VIN to

12VOUT at 5A Measured in 10 Meter Chamber

Thermal Considerations and Output Current Derating

In different applications, LTM4612 operates in a variety

of thermal environments. The maximum output current is

limited by the environment thermal condition. Sufﬁcient

cooling should be provided to help ensure reliable opera-

FREQUENCY (MHz)

1000

900

800

700

600

500

400

300

200

100

4612 F08

CISPR22, CLASS B

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