LTC3550 datasheet(18/24 Pages) LINER

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LTC3550

3550fa

APPLICATIO S I FOR ATIO

switch gate charge currents. The gate charge current

results from switching the gate capacitance of the

internal power MOSFET switches. Each time the gate

is switched from high to low to high again, a packet of

charge, dQ, moves from VCC to ground. The resulting

dQ/dt is the current out of VCC that is typically larger

than the DC bias current. In continuous mode, IGATECHG

= f(QT + QB) where QT and QB are the gate charges of

the internal top and bottom switches. Both the DC bias

and gate charge losses are proportional to VCC and

thus their effects will be more pronounced at higher

supply voltages.

2. I2R losses are calculated from the resistances of the

internal switches, RSW, and external inductor RL. In

continuous mode, the average output current ﬂowing

through inductor L is “chopped” between the main

switch and the synchronous switch. Thus, the series

resistance looking into the SW pin is a function of both

top and bottom MOSFET RDS(ON) and the duty cycle

(DC) as follows:

RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)

The RDS(ON) for both the top and bottom MOSFETs can

be obtained from the Typical Performance Characteristics

curves. Thus, to obtain I2R losses, simply add RSW to RL

and multiply the result by the square of the average output

current. Other losses including CIN and COUT ESR dissipa-

tive losses and inductor core losses generally account for

less than 2% total additional loss.

Thermal Considerations

The battery charger’s thermal regulation feature and the

buck regulator’s high efﬁciency make it unlikely that enough

power will be dissipated to exceed the LTC3550 maximum

junction temperature. Nevertheless, it is a good idea to

do some thermal analysis for worst-case conditions.

The junction temperature, TJ, is given by: TJ = TA + TRISE

where TA is the ambient temperature. The temperature

rise is given by:

TRISE = PD • θJA

where PD is the power dissipated and θJA is the thermal

resistance from the junction of the die to the ambient

temperature.

In most applications the buck regulator does not dissi-

pate much heat due to its high efﬁciency. The majority of

the LTC3550 power dissipation occurs when charging a

battery. Fortunately, the LTC3550 automatically reduces

the charge current during high power conditions using

a patented thermal regulation circuit. Thus, there is no

need to design for worst-case power dissipation scenarios

because the LTC3550 ensures that the battery charger

power dissipation never raises the junction temperature

above a preset value of 105°C. In the unlikely case that

the junction temperature is forced above 105°C (due to

abnormally high ambient temperatures or excessive buck

regulator power dissipation), the battery charge current will

be reduced to zero and thus dissipate no heat. As an added

measure of protection, even if the junction temperature

reaches approximately 150°C, the buck regulator’s power

switches will be turned off and the SW node will become

high impedance.

The conditions that cause the LTC3550 to reduce charge

current through thermal feedback can be approximated by

considering the power dissipated in the IC. The approxi-

mate ambient temperature at which the thermal feedback

begins to protect the IC is:

TA = 105°C – TRISE

TA = 105°C – (PD • θJA)

TA = 105°C – (PD(CHARGER) + PD(BUCK)) • θJA

(5)

Most of the charger’s power dissipation is generated from

the internal charger MOSFET. Thus, the power dissipation

is calculated to be:

PD(CHARGER) = (VIN – VBAT) • IBAT

(6)

VIN is the charger supply voltage (either DCIN or USBIN),

VBAT is the battery voltage and IBAT is the charge cur-

rent.

Example: An LTC3550 operating from a 5V wall adapter

(on the DCIN input) is programmed to supply 650mA

full-scale current to a discharged Li-Ion battery with a

voltage of 3V.

The charger power dissipation is calculated to be:

PD(CHARGER) = (5V – 3V) • 650mA = 1.3W

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