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LTC3550 Datasheet(PDF) 21 Page - Linear Technology |
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LTC3550 Datasheet(HTML) 21 Page - Linear Technology |
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21 / 24 page ![]() LTC3550 21 3550fa APPLICATIO S I FOR ATIO 1. The power traces, consisting of the GND trace, the SW trace and the VCC trace should be kept short, direct and wide. 2. Does the VFB pin connect directly to the feedback resis- tors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and ground. 3. Does the (+) plate of CIN connect to VCC as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 4. Keep the switching node, SW, away from the sensitive VFB node. 5. Keep the (–) plates of CIN and COUT as close as possible. 6. Solder the exposed pad on the backside of the package to PC board ground for optimum thermal performance. The thermal resistance of the package can be further enhanced by increasing the area of the copper used for PC board ground. Design Example As a design example, assume the LTC3550 is used in a single lithium-ion battery-powered cellular phone application. The battery is charged by either plugging a wall adapter cable into the phone or putting the phone in a USB cradle. The optimum charge current for this parti- cular lithium-ion battery is determined to be 800mA. The buck regulator output voltage needs to be 1.8V. Starting with the charger, choosing RIDC to be 1.24k programs the charger for 806mA. Choosing RIUSB to be 2.1k programs the charger for 475mA when charging from the USB cradle, ensuring that the charger never exceeds the 500mA maximum current supplied by the USB port. A good rule of thumb for ITERMINATE is one- tenth the full charge current, so RITERM is picked to be 1.24k (ITERMINATE = 80mA). Moving on to the step-down converter, VCC will be pow- ered from the battery which can range from a maximum of 4.2V down to about 2.7V. The load current requirement Figure 7. DC-DC Converter Suggested Layout VCC VFB VOUT SW RUN L1 GND VIA TO VOUT VIA TO GND CIN R2 3550 F07 VIA TO VCC R1 CF COUT |
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