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LTC3728 Datasheet(PDF) 13 Page - Linear Technology |
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LTC3728 Datasheet(HTML) 13 Page - Linear Technology |
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13 / 32 page ![]() 13 LTC3728 3728fb Figure 1 on the first page is a basic LTC3728 application circuit. External component selection is driven by the load requirement, and begins with the selection of RSENSE and the inductor value. Next, the power MOSFETs and D1 are selected. Finally, CIN and COUT are selected. The circuit shown in Figure 1 can be configured for operation up to an input voltage of 28V (limited by the external MOSFETs). RSENSE Selection For Output Current RSENSE is chosen based on the required output current. The LTC3728 current comparator has a maximum thresh- old of 75mV/RSENSE and an input common mode range of SGND to 1.1(INTVCC). The current comparator threshold sets the peak of the inductor current, yielding a maximum average output current IMAX equal to the peak value less half the peak-to-peak ripple current, ∆IL. Allowing a margin for variations in the LTC3728 and external component values yields: R mV I SENSE MAX = 50 When using the controller in very low dropout conditions, the maximum output current level will be reduced due to the internal compensation required to meet stability crite- rion for buck regulators operating at greater than 50% duty factor. A curve is provided to estimate this reducton in peak output current level depending upon the operating duty factor. Operating Frequency The LTC3728 uses a constant frequency phase-lockable architecture with the frequency determined by an internal capacitor. This capacitor is charged by a fixed current plus an additional current which is proportional to the voltage applied to the PLLFLTR pin. Refer to Phase-Locked Loop and Frequency Synchronization in the Applications Infor- mation section for additional information. A graph for the voltage applied to the PLLFLTR pin vs frequency is given in Figure 5. As the operating frequency is increased the gate charge losses will be higher, reducing efficiency (see Efficiency Considerations). The maximum switching frequency is approximately 550kHz. Inductor Value Calculation The operating frequency and inductor selection are inter- related in that higher operating frequencies allow the use of smaller inductor and capacitor values. So why would anyone ever choose to operate at lower frequencies with larger components? The answer is efficiency. A higher frequency generally results in lower efficiency because of MOSFET gate charge losses. In addition to this basic trade-off, the effect of inductor value on ripple current and low current operation must also be considered. The inductor value has a direct effect on ripple current. The inductor ripple current ∆IL decreases with higher induc- tance or frequency and increases with higher VIN: ∆I fL V V V L OUT OUT IN = ⎛ ⎝⎜ ⎞ ⎠⎟ 1 1 ()( ) – Accepting larger values of ∆IL allows the use of low inductances, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is ∆IL=0.3(IMAX). The maximum ∆IL occurs at the maximum input voltage. APPLICATIO S I FOR ATIO Figure 5. PLLFLTR Pin Voltage vs Frequency OPERATING FREQUENCY (kHz) 200 250 300 350 550 400 450 500 3728 F05 2.5 2.0 1.5 1.0 0.5 0 |
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