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LTC3835

3835fc

inductance collapses abruptly when the peak design current

is exceeded. This results in an abrupt increase in inductor

ripple current and consequent output voltage ripple. Do

not allow the core to saturate!

Power MOSFET and Schottky Diode (Optional)

Selection

Two external power MOSFETs must be selected for the

LTC3835: One N-channel MOSFET for the top (main)

switch, and one N-channel MOSFET for the bottom (syn-

chronous) switch.

The peak-to-peak drive levels are set by the INTVCC voltage.

This voltage is typically 5V during start-up (see EXTVCC Pin

Connection). Consequently, logic-level threshold MOSFETs

must be used in most applications. The only exception

is if low input voltage is expected (VIN < 5V); then, sub-

logic level threshold MOSFETs (VGS(TH) < 3V) should be

used. Pay close attention to the BVDSS speciﬁcation for

the MOSFETs as well; most of the logic level MOSFETs are

limited to 30V or less.

Selection criteria for the power MOSFETs include the “ON”

resistance RDS(ON), Miller capacitance CMILLER, input

voltage and maximum output current. Miller capacitance,

CMILLER, can be approximated from the gate charge curve

usually provided on the MOSFET manufacturers’ data

sheet. CMILLER is equal to the increase in gate charge

along the horizontal axis while the curve is approximately

ﬂat divided by the speciﬁed change in VDS. This result is

then multiplied by the ratio of the application applied VDS

to the Gate charge curve speciﬁed VDS. When the IC is

operating in continuous mode the duty cycles for the top

and bottom MOSFETs are given by:

Main Switch Duty Cycle

Synchronous Switc

OUT

h Duty Cycle

OUT

–

The MOSFET power dissipations at maximum output

current are given by:

MAIN

OUT

MAX

DS ON

MAX

() +

()

⎛

⎝⎜

⎞

⎠⎟ ()(

)

MILLER

INTVCC

THMIN

•

–

MIN

SYNC

OUT

MAX

⎡

⎣

⎢

⎤

⎦

⎥()

() +

()

–

δ DDS ON

()

where

δ is the temperature dependency of RDS(ON) and

RDR (approximately 2Ω) is the effective driver resistance

at the MOSFET’s Miller threshold voltage. VTHMIN is the

typical MOSFET minimum threshold voltage.

Both MOSFETs have I2R losses while the topside N-channel

equation includes an additional term for transition losses,

which are highest at high input voltages. For VIN < 20V

the high current efﬁciency generally improves with larger

MOSFETs, while for VIN > 20V the transition losses rapidly

increase to the point that the use of a higher RDS(ON) device

with lower CMILLER actually provides higher efﬁciency. The

synchronous MOSFET losses are greatest at high input

voltage when the top switch duty factor is low or during

a short-circuit when the synchronous switch is on close

to 100% of the period.

The term (1+

δ) is generally given for a MOSFET in the

form of a normalized RDS(ON) vs Temperature curve, but

δ = 0.005/°C can be used as an approximation for low

voltage MOSFETs.

The optional Schottky diode D1 shown in Figure 6 conducts

during the dead-time between the conduction of the two

power MOSFETs. This prevents the body diode of the

bottom MOSFET from turning on, storing charge during

the dead-time and requiring a reverse recovery period that

could cost as much as 3% in efﬁciency at high VIN. A 1A

to 3A Schottky is generally a good compromise for both

regions of operation due to the relatively small average

current. Larger diodes result in additional transition losses

due to their larger junction capacitance.

APPLICATIONS INFORMATION

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