CD4066B

CMOS QUAD BILATERAL SWITCH

SCHS051D – NOVEMBER 1998 – REVISED SEPTEMBER 2003

2

POST OFFICE BOX 655303

description/ordering information (continued)

ORDERING INFORMATION

TA

PACKAGE†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

–55 C to 125 C

CDIP – F

Tube of 25

CD4066BF3A

CD4066BF3A

–55 C to 125 C

PDIP – E

Tube of 25

CD4066BE

CD4066BE

–55 C to 125 C

SOIC – M

Tube of 50

CD4066BM

CD4066BM

–55

°C to 125°C

SOIC – M

Reel of 2500

CD4066BM96

CD4066BM

–55

°C to 125°C

Reel of 250

CD4066BMT

SOP – NS

Reel of 2000

CD4066BNSR

CD4066B

TSSOP – PW

Tube of 90

CD4066BPW

CM066B

TSSOP – PW

Reel of 2000

CD4066BPWR

CM066B

† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design

guidelines are available at www.ti.com/sc/package.

† All control inputs are protected by the CMOS protection network.

NOTES: A. All p substrates are connected to VDD.

B. Normal operation control-line biasing: switch on (logic 1), VC = VDD; switch off (logic 0), VC = VSS

C. Signal-level range: VSS ≤ Vis ≤ VDD

Control

VC†

VDD

VSS

VSS

n

n

p

Out

Vos

Control

Switch

In

92CS-29113

n

p

Vis

Figure 1. Schematic Diagram of One-of-Four Identical Switches and Associated Control Circuitry