S25FL032P datasheet(39/64 Pages) SPANSION

39 / 64 page

February 12, 2009 S25FL032P_00_02

S25FL032P

Data

Sheet

(Preliminar y )

Figure 9.16 Write Registers (WRR) Instruction Sequence – 16 data bits

Note

As defined by the values in the Block Protect (BP2, BP1, BP0) bits of the Status Register, as shown in Table 7.2 on page 17.

Table 9.9 shows that neither W#/ACC or SRWD bit by themselves can enable HPM. The device can enter

HPM either by setting the SRWD bit after driving W#/ACC low, or by driving W#/ACC low after setting the

SRWD bit. However, the device disables HPM only when W#/ACC is driven high.

Note that HPM only protects against changes to the status register. Since BP2:BP0 cannot be changed in

HPM, the size of the protected area of the memory array cannot be changed. Note that HPM provides no

protection to the memory array area outside that specified by BP2:BP0 (Software Protected Mode, or SPM).

If W#/ACC is permanently tied high, HPM can never be activated, and only the SPM (BP2:BP0 bits of the

Status Register) can be used.

The Status and Configuration registers originally default to 00h, when the device is first shipped from the

factory to the customer.

Table 9.9 Protection Modes

W#/

ACC

SRWD

Bit

Mode

Write Protection of Registers

Memory Content

Protected Area

Unprotected Area

Software

Protected

(SPM)

Status & Configuration Registers are Writable

(if WREN instruction has set the WEL bit). The

values in the SRWD, BP2, BP1, & BP0 bits &

those in the Configuration Register can be

changed

Protected against Page

Program, Quad Page

Program, Parameter

Sector Erase, Sector

Erase, and Bulk Erase

Ready to accept Page

Program, Quad Page

Program, Parameter

Sector Erase, & Sector

Erase instructions

Hardware

Protected

(HPM)

Status & Configuration Registers are Hardware

Write Protected. The values in the SRWD,

BP2, BP1, & BP0 bits & those in the

Configuration Register cannot be changed

Protected against Page

Program, Quad Input

Program, Sector Erase,

and Bulk Erase

Ready to accept Page

Program, Quad Input

Program & Sector Erase

instructions

IInstruction

Status Register In

SCK

MSB

High Impedance

Configuration Register In

MSB

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