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SPW34119D Datasheet(PDF) 5 Page - SeCoS Halbleitertechnologie GmbH |
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SPW34119D Datasheet(HTML) 5 Page - SeCoS Halbleitertechnologie GmbH |
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5 / 9 page ![]() Elektronische Bauelemente http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 5 of 9 I Chip Disable The Chip Disable (Pin 1) can be used to power down the IC to conserve power, or for muting, or both. When at a Logic "0" (0 V to 0.8 V), the SPW34119D is enabled for normal operation. When Pin 1 is at a Logic "1" (2.0 V to VCC V), the IC is disabled. If Pin 1 is open, that is equivalent to a Logic "0", although good design practice dictates that an input should never be left open. Input impedance at Pin 1 is a nominal 90 k . The power supply current (when disabled) is shown in Figure 19. Muting, defined as the change in differential gain from normal operation to muted operation, is in excess of 70 dB. The turn-off time of the audio output, from the application of the CD signal, is <2.0 us, and turn on-time is 12 ms-15 ms. Both times are independent of C1,C2, and VCC. When the SPW34119D is disabled, the voltages at FC1 and FC2 do not change as they are powered from VCC. The outputs, VO1 and VO2, change to a high impedance condition, removing the signal from the speaker. If signals from other sources are to be applied to the outputs (while disabled), they must be within the range of VCC and Ground. Power Dissipation Figures 8 to 10 indicate the device dissipation (within the IC) for various combinations of VCC, RL, and load power. The maximum power which can safely be dissipated within the SPW34119D is found from the following equation: PD = (140 : -TA)/ JA where TA is the ambient temperature; and JA is the package thermal resistance (100 : /W for the standard DIP package.) The power dissipated within the SPW34119D, in a given application, is found from the following equation: PD = (VCC x ICC) + (IRMS x VCC) – (RL x IRMS 2) where ICC is obtained from Figure 19; and IRMS is the RMS current at the load; and RL is the load resistance. Figures 8 to 10, along with Figures 11 to 13 (distortion curves), and a peak working load current of D200 mA, define the operating range for the SPW34119D. The operating range is further defined in terms of allowable load power in Figure 14 for loads of 8.0 , 16 and 32 . The left (ascending) portion of each of the three curves is defined by the power level at which 10% distortion occurs. The center flat portion of each curve is defined by the maximum output current capability of the SPW34119D. The right (descending) portion of each curve is defined by the maximum internal power dissipation of the IC at 25 : . At higher ambient temperatures, the maximum load power must be reduced according to the above equations. Operating the device beyond the current and junction temperature limits will degrade long term reliability. Layout Considerations Normally a snubber is not needed at the output of the SPW34119D, unlike many other audio amplifiers. However, the PC board layout, stray capacitances, and the manner in which the speaker wires are configured, may dictate otherwise. Generally, the speaker wires should be twisted tightly, and not more than a few inches in length. Characteristics Curve Fig 1. Turn-On Time versus C1, C2 at Power-On Fig 2. Amplifier #1 Open Loop Gain and Phase SPW34119D Low Power Audio Amplifier |
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