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THS1206DA Datasheet(PDF) 7 Page - Texas Instruments

Part # THS1206DA
Description  12-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS
PDF  41 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

THS1206DA Datasheet(HTML) 7 Page - Texas Instruments

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THS1206
12-BIT 6 MSPS, SIMULTANEOUS SAMPLING
ANALOG-TO-DIGITAL CONVERTERS
SLAS217D – MAY 1999 – REVISED APRIL 2000
7
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions, VREF = internal, fs = 6 MHz,
fI = 2 MHz at –1dBFS (unless otherwise noted) (continued)
ac specifications, AVDD = 5 V, BVDD = DVDD = 3.3 V, CL < 30 pF
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SINAD
Signal to noise ratio + distortion
Differential mode
63
68
dB
SINAD
Signal-to-noise ratio + distortion
Single-ended mode (see Note 1)
64
dB
SNR
Signal to noise ratio
Differential mode
64
69
dB
SNR
Signal-to-noise ratio
Single-ended mode (see Note 1)
65
dB
Differential mode
C and I suffix
–73
–69
THD
Total harmonic distortion
Differential mode
Q and M suffix
–73
–67
dB
THD
Total harmonic distortion
Single ended mode
C and I suffix
–73
–69
dB
Single-ended mode
Q and M suffix
–73
–67
ENOB
Effective number of bits
Differential mode
10.3
11
Bits
(SNR)
Effective number of bits
Single-ended mode (see Note 1)
10.4
Bits
SFDR
Spurious free dynamic range
Differential mode
68
75
dB
SFDR
Spurious free dynamic range
Single-ended mode
68
75
dB
Analog Input
Full-power bandwidth with a source impedance of
150
Ω in differential configuration.
FS sinewave, –3 dB
96
MHz
Full-power bandwidth with a source impedance of
150
Ω in single-ended configuration.
FS sinewave, –3 dB
54
MHz
Small-signal bandwidth with a source impedance
of 150
Ω in differential configuration.
100 mVpp sinewave, –3 dB
96
MHz
Small-signal bandwidth with a source impedance
of 150
Ω in single-ended configuration.
100 mVpp sinewave, –3 dB
54
MHz
NOTE 1: The SNR (ENOB) and SINAD is degraded typically by 2 dB in single-ended mode when the reading of data is asynchronous to the
sampling clock.



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