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THS1206DA Datasheet(PDF) 12 Page - Texas Instruments |
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THS1206DA Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 41 page ![]() THS1206 12-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS SLAS217D – MAY 1999 – REVISED APRIL 2000 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 continuous conversion mode (continued) Figure 4 shows the timing of continuous conversion mode when three analog input channels are selected. The maximum throughput rate per channel is 2 MSPS in this mode. The data flow in the bottom of the figure shows in which order the converted data is written into the FIFO. The timing of the DATA_AV signal shown here is for a trigger level set to 3. AIN CONV_CLK Data Into FIFO DATA_AV, Trigger Level = 3 td(DATA_AV) Sample N Channel 1,2,3 Sample N+1 Channel 1,2,3 Sample N+2 Channel 1,2,3 td(O) Data N–2 Channel 2 Data N–2 Channel 3 Data N–1 Channel 2 Data N–1 Channel 2 Data N–1 Channel 3 Data N Channel 1 Data N Channel 2 Data N+1 Channel 3 tc td(A) tw(CONV_CLKH) tw(CONV_CLKL) td(Pipe) 50% 50% Figure 4. Timing of Continuous Conversion Mode (3-channel operation) Figure 5 shows the timing of continuous conversion mode when four analog input channels are selected. The maximum throughput rate per channel is 1.5 MSPS in this mode. The data flow in the bottom of the figure shows in which order the converted data is written into the FIFO. The timing of the DATA_AV signal shown here is for a trigger level of 4. AIN CONV_CLK Data Into FIFO DATA_AV, Trigger Level = 4 tw(CONV_CLKH) Sample N Channel 1,2,3,4 Sample N+1 Channel 1,2,3,4 Sample N+2 Channel 1,2,3,4 td(Pipe) tw(CONV_CLKL) tc td(O) Data N–2 Channel 4 Data N–1 Channel 1 Data N–1 Channel 2 Data N–1 Channel 3 Data N–1 Channel 4 Data N Channel 1 Data N Channel 2 Data N Channel 3 Data N Channel 4 td(DATA_AV) td(A) 50% 50% Figure 5. Timing of Continuous Conversion Mode (4-channel operation) |
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