TLV5580

8-BIT, 80 MSPS LOW-POWER A/D CONVERTER

SLAS205A – DECEMBER 1998 – REVISED JANUARY 1999

8

POST OFFICE BOX 655303

of external voltage references (unless otherwise noted) (continued)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

fin = 1 MHz

6.6

7.0

Effective number of bits ENOB

fin = 4.43 MHz

6.6

7.0

Bits

Effective number of bits, ENOB

fin = 15 MHz

6.5

Bits

fin = 76 MHz

6.6

fin = 1 MHz

41.5

43.5

Signal to total harmonic distortion + noise S/(THD+N)

fin = 4.43 MHz

41.5

43.5

dB

Signal-to-total harmonic distortion + noise, S/(THD+N)

fin = 15 MHz

41

dB

fin = 76 MHz

41.5

fin = 1 MHz

–46

–50

Total harmonic distortion (THD)

fin = 4.43 MHz

–45.5

–49

dB

Total harmonic distortion (THD)

fin = 15 MHz

–44

dB

fin = 76 MHz

–45.5

fin = 1 MHz

48

53

Spurious free dynamic range (SFDR)

fin = 4.43 MHz

48

53

dB

Spurious free dynamic range (SFDR)

fin = 15 MHz

46.5

dB

fin = 76 MHz

48.5

Analog input full-power bandwidth, BW

See Note 4

700

MHz

Differential phase DP

f40 MH

f

4 43 MH

08

°

Differential phase, DP

fclk = 40 MHz, fin = 4.43 MHz,

0.8

°

Differential gain DG

clk

in

20 IRE amplitude vs. full-scale of 140 IRE

06

%

Differential gain, DG

20 IRE am litude vs. full scale of 140 IRE

0.6

%

† Based on analog input voltage of – 1 dBFS referenced to a 1.3 Vpp full-scale input range and using the external voltage references at

fclk = 80 MSPS with AVDD = DVDD = 3.3 V and DRVDD = 3.0 V at 25°C.

NOTE 4: The analog input bandwidth is defined as the maximum frequency of a –1 dBFS input sine that can be applied to the device for which

an extra 3 dB attenuation is observed in the reconstructed output signal.