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TLV5590 Datasheet(PDF) 13 Page - Texas Instruments |
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TLV5590 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 16 page ![]() TLV5590 2-BIT ANALOG-TO-DIGITAL CONVERTER FOR FLEX t PAGER CHIPSET SLAS134B – NOVEMBER 1995 – REVISED NOVEMBER 1996 13 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PRINCIPLES OF OPERATION test mode 1 – switched-capacitor filter test Test mode 1 places the output of the switched-capacitor low-pass filter directly on EXTS1. Note that the filter output is not capable of driving an external load and, therefore, must be buffered externally at the EXTS1 terminal of the TLV5590. The BW input selects the filter cut-off frequency. The peak and valley DAC counters, the decay counters, and the 2-bit ADC are all disabled during this test mode. Table 7 contains a terminal function summary of this test mode. Table 7. Test Mode 1 Selection TEST = HIGH, CON1 = LOW, CON2 = HIGH TEST INPUT TERMINAL INPUT RESULT/MODE BW Low 1-kHz cutoff frequency (–3 dB) BW High 2-kHz cutoff frequency (–3 dB) TEST OUTPUT TERMINAL OUTPUT SIGNAL EXTS1 Switched-capacitor filter output (unbuffered)† † The filter output must be buffered externally for testing. test mode 2 – peak and valley DAC output test Test mode 2 allows direct access to the peak and valley comparators and can be used for the pager system debug. The peak and valley comparator outputs are accessible on the EXTS0 and EXTS1 terminals respectively. The peak and valley counters are held at a constant value using the hold mode. Table 8 contains a terminal function summary of this test mode. Table 8. Test Mode 2 Selection TEST = HIGH, CON1 = HIGH, CON2 = LOW TEST OUTPUTS TERMINAL OUTPUT SIGNAL EXTS1 Peak DAC voltage EXTS2 Valley DAC voltage |
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