TMS279X (WD279X) FLOPPY DISK FORMATTER / CONTROLLER FAMILY

6

When executing the Seek command, the data register holds 5e address of the desired track position. This

register is loaded from the DAL and gated onto the DAL under processor control.

track register

This 8-bit register holds the track number of the current read/write head position. It is incremented by one

every time the head is stepped in (towards track 76) and decremented by one when the head is stepped out

(towards track 00). The contents of the register are compared with the recorded track number in the ID field

during disk read, write and verify operations. The track register can be loaded from or transferred to the DAL.

This register should not be loaded when the device is busy.

sector register (SR)

This 8-bit register holds the address of the desired sector position. The contents of the register are compared

with the recorded sector number in the ID field during disk read or write operations. The sector register

contents can be loaded from or transferred to the DAL. This register should not be loaded when the device is

busy.

command register (CR)

This 8-bit register holds the command presently being executed. This register should not be loaded when the

device is busy unless the new command is a force interrupt. The command register can be loaded from the

DAL, but not read onto the DAL.

status register (STR)

This 8-bit register holds device status information. The meaning of the status bits is a function of the type of

command previously executed. This register can be read onto the DAL, but not loaded from the DAL.

CRC logic

This logic is used to check or to generate the 16-bit cyclic redundancy check (CRC). The polynomial is:

G(x) = x16 + x12 + x5 + 1.

The CRC includes all information starting with the address mark and up to the CRC characters. The CRC

register is preset to ones prior to data being shifted through the circuit.

arithmetic/logic unit (ALU)

The ALU is a serial comparator, incrementer, and decrementer and is used for register modification and

comparisons with the disk recorded ID field.

timing and control

All computer and floppy disk interface controls are generated through this logic. The internal device timing is

generated from an external crystal clock.

AM detector

The address mark detector detects ID, data and index address marks during read and write operations.

write precompensation

Enables write precompensation to be performed on the double-density write data output.

data separator

A high-performance phase-lock-loop data separator with on-chip VCO and phase comparator allows

adjustable frequency range for 5¼" or 8" floppy disk interfacing.