TMS320VC549 datasheet(51/111 Pages) TI

51 / 111 page

TMS320C54x, TMS320LC54x, TMS320VC54x

FIXED-POINT DIGITAL SIGNAL PROCESSORS

SPRS039C – FEBRUARY 1996 – REVISED DECEMBER 1999

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

Table 13. ’54x Instruction Set Opcodes (Continued)

MNEMONIC SYNTAX

OPCODE

WORDS/

CYCLES†

DESCRIPTION

MNEMONIC SYNTAX

LSB

MSB

WORDS/

CYCLES†

DESCRIPTION

LOAD / STORE INSTRUCTIONS (CONTINUED)

STH

src, ASM, Smem

Shift ACC high by ASM, store to data memory

1/1

1000

011S

IAAA

AAAA

STH

src, SHFT, Xmem

Shift ACC high, then store to data memory

1/1

1001

101S

XXXX

SHFT

STH

src [, SHIFT ], Smem

Shift ACC high, then store to data memory

(2-word opcode)

2/2

0110

0000

1111

110S

IAAA

011S

AAAA

HIFT

src, Ymem

|| ADD

Xmem, dst

Store ACC with parallel add

1/1

1100

00SD

XXXX

YYYY

src, Ymem

|| LD

Xmem, dst

Store ACC with parallel load into accumulator

1/1

1100

10SD

XXXX

YYYY

src, Ymem

|| LD

Xmem, T

Store ACC with parallel load into TREG

1/1

1110

01S0

XXXX

YYYY

src, Ymem

|| MAC[R]

Xmem, dst

Parallel store and multiply ACC [round]

1/1

1101

0RSD

XXXX

YYYY

src, Ymem

|| MAS[R]

Xmem, dst

Parallel store, multiply, and subtract

1/1

1101

1RSD

XXXX

YYYY

src, Ymem

|| MPY

Xmem, dst

Parallel store and multiply

1/1

1100

11SD

XXXX

YYYY

src, Ymem

|| SUB

Xmem, dst

Parallel store and subtract

1/1

1100

01SD

XXXX

YYYY

STL

src, Smem

Store ACC low to data memory

1/1

1000

000S

IAAA

AAAA

STL

src, ASM, Smem

Shift ACC low by ASM, store to data memory

1/1

1000

010S

IAAA

AAAA

STL

src, SHFT, Xmem

Shift ACC low, then store to data memory

1/1

1001

100S

XXXX

SHFT

STL

src [, SHIFT], Smem

Shift ACC low, then store to data memory

(2-word opcode)

2/2

0110

0000

1111

110S

IAAA

100S

AAAA

HIFT

STLM

src, MMR

Store ACC low to MMR

1/1

1000

100S

IAAA

AAAA

STM #

lk, MMR

Store long-immediate to MMR

2/2

0111

IAAA

AAAA

STRCD

Xmem, cond

Store TREG conditionally

1/1

1001

1100

XXXX

COND

LOGICAL INSTRUCTIONS

AND

Smem, src

AND single data-memory operand with ACC

1/1

0001

100S

IAAA

AAAA

AND #

lk [, SHFT ], src [, dst ]

Shift long-immediate operand, AND with ACC

2/2

1111

00SD

0011

SHFT

AND #

lk, 16, src [, dst ]

Shift long-immediate 16 bits, AND with ACC

2/2

1111

00SD

0110

0011

AND

src [, SHIFT ], [, dst ]

AND accumulator(s), then shift result

1/1

1111

00SD

100S

HIFT

ANDM #

lk, Smem

AND memory with long-immediate operand

2/2

0110

1000

IAAA

AAAA

BIT

Xmem, BITC

Test bit

1/1

1001

0110

XXXX

BITC

BITF

Smem, #lk

Test bit field specified by immediate value

2/2

0110

0001

IAAA

AAAA

BITT

Smem

Test bit specified by TREG

1/1

0011

0100

IAAA

AAAA

CMPL

src [, dst ]

Complement accumulator

1/1

1111

01SD

1001

0011

CMPM

Smem, #lk

Compare memory with long-immediate operand

2/2

0110

0000

IAAA

AAAA

CMPR

CC, ARx

Compare auxiliary register with AR0

1/1

1111

01CC

1010

1ARX

Smem, src

OR single data-memory operand with ACC

1/1

0001

101S

IAAA

AAAA

† Values for words and cycles assume the use of DARAM for data. Add one word and one cycle when using long-offset indirect addressing or

absolute addressing with a single data-memory operand.

‡ Delayed Instruction

§ Condition true

¶ Condition false

instruction set summary (continued)

TMS320VC549 Datasheet(PDF) 51 Page - Texas Instruments

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