TPS75201Q, TPS75215Q, TPS75218Q, TPS75225Q, TPS75233Q WITH RESET

TPS75401Q, TPS75415Q, TPS75418Q, TPS75425Q, TPS75433Q WITH POWER GOOD

FAST-TRANSIENT-RESPONSE 2-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS242B – MARCH 2000 – REVISED JUNE 2003

25

POST OFFICE BOX 655303

THERMAL INFORMATION

thermally enhanced TSSOP-20 (PWP – PowerPad

) (continued)

dissipation is:

P

D(total) +

V

I *

V

O

I

O +

(5

* 3.3)

0.8

+ 1.36 W

(9)

calculated limit. When it does, one of two corrective actions should be made: raising the power-dissipation limit

by increasing the airflow or the heat-sink area, or lowering the internal power dissipation of the regulator by

reducing the input voltage or the load current. In either case, the above calculations should be repeated with

the new system parameters.

mounting information

The primary requirement is to complete the thermal contact between the thermal pad and the PWB metal. The

thermal pad is a solderable surface and is fully intended to be soldered at the time the component is mounted.

Although voiding in the thermal-pad solder-connection is not desirable, up to 50% voiding is acceptable. The

data included in Figures 26 and 27 is for soldered connections with voiding between 20% and 50%. The thermal

analysis shows no significant difference resulting from the variation in voiding percentage.

Figure 29 shows the solder-mask land pattern for

the PWP package. The minimum recommended

heat-sink area is also illustrated. This is simply a

copper plane under the body extent of the

package, including metal routed under terminals

1, 10, 11, and 20.

Figure 29. PWP Package Land Pattern

Location of Exposed

Thermal Pad on

PWP Package

Minimum Recommended

Heat-Sink Area