PCM1795DB datasheet(34/58 Pages) TI

34 / 58 page

R/W

RSV

DZ1

DZ0

PCMZ

B15

B14

B13

B12

B11

B10

RSV

ZFGR

ZFGL

B15

B14

B13

B12

B11

B10

PCM1795

SLES248 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com

R/W: Read/Write Mode Select

When R/W = 0, a write operation is performed.

When R/W = 1, a read operation is performed.

Default value: 0

DZ[1:0]: DSD Zero Output Enable

These bits are available for read and write.

Default value: 00

DZ[1:0]

Zero Output Enable

Disabled (default)

Even pattern detect 1 × 96h pattern detect

The DZ bits are used to enable or disable the output zero flags and to select the zero pattern in DSD mode.

PCMZ: PCM Zero Output Enable

These bits are available for read and write.

Default value: 1

PCMZ

PCM Zero Output Setting

PCMZ = 0

PCM zero output disabled

PCMZ = 1

PCM zero output enabled (default)

The PCMZ bit is used to enable or disable the output zero flags in PCM mode and the external DF mode.

R: Read Mode Select

Value is always '1', specifying the readback mode.

ZFGx: Zero-Detection Flag

Where x = L or R, corresponding to the DAC output channel. These bits are available only for readback.

Default value: 00

ZFGx

Zero Detection

ZFGx = 0

Not zero

ZFGx = 1

Zero detected

These bits show zero conditions. The status is the same as that of the zero flags at ZEROL (pin 1) and ZEROR

(pin 2). See Zero Detect in the Function Descriptions section.

Submit Documentation Feedback

Product Folder Link(s): PCM1795

PCM1795DB Datasheet(PDF) 34 Page - Texas Instruments

PCM1795DB Datasheet(HTML) 34 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58

Datasheet Download

Link URL