PI2001 datasheet(14/23 Pages) VICOR

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during MOSFET turn-off after a reverse current fault

has been detected. In Active ORing applications when

one of the input power sources is shorted, a large

reverse current is sourced from the circuit output

through the MOSFET. Depending on the output

impedance of the system, the reverse current may

reach over 60A in some conditions before the

MOSFET is turned off. Such high current conditions

will store energy even in a small parasitic element.

For example, a 1nH parasitic inductance with 60A

reverse current will store 1.8µJ (½Li

2). When the

MOSFET is turned off, the stored energy will be

released and will produce high negative voltage

ringing at the MOSFET source. This event will create

a high voltage difference across the drain and source

of the MOSFET.

The MOSFET current rating and maximum power

dissipation are closely related. Generally the lower the

MOSFET Rds(on), the higher the current capability

and the lower the resultant power dissipation. This

leads to reduced thermal management overhead, but

will ultimately be higher cost compared to higher

Rds(on) parts. It is important to understand the

primary design goal objectives for the application in

order to effectively trade off the performance of one

MOSFET versus another.

Power dissipation in active ORing circuits is derived

from the total source current and the on-state

resistance of the selected MOSFET.

MOSFET power dissipation:

)

(

Rds

MOSFET

∗

Where :

: Source Current

Rds(on)

: MOSFET on-state resistance

Note:

In the calculation use Rds(on) at maximum MOSFET

temperature

because

Rds(on)

temperature

dependent. Refer to the normalized Rds(on) curves in

the

MOSFET

manufacturers

datasheet.

Some

MOSFET Rds(on) values may increase by 50% at

125°C compared to values at 25°C.

The Junction Temperature rise is a function of power

dissipation and thermal resistance.

)

(

Rds

Rth

Trise

MOSFET

∗

Where:

Rth : Junction-to-Ambient thermal resistance

Rds(on) and PI2001 sensing:

The PI2001 senses the MOSFET source-to-drain

voltage drop via the SP and SN pins to determine the

status of the current through the MOSFET. When the

MOSFET is fully enhanced, its source-to-drain voltage

is equal to the MOSFET on-state resistance multiplied

by the source current, VSD = Rds(on)*Is. The reverse

current threshold is set for -6mV and when the

differential voltage between the SP & SN pins is less

than -6mV, i.e. SP-SN

≤-6mV, the PI2001 detects a

reverse current fault condition and pulls the MOSFET

gate pin low, thus turning off the MOSFET and

preventing further reverse current. The reverse

current fault protection disconnects the power source

fault condition from the redundant bus, and allows the

system to keep running.

The GATE pin output voltage is clamped to 10.5V

maximum with respect to the SP pin, which should be

tied to the MOSFET source pin, to support any

MOSFET with a Vgs rating of ±12V or greater. A Vgs

rating

≥12V is very common for industry standard N-

Channel MOSFETs.

OV/UV resistor selection:

The UV and OV comparator inputs are used to

monitor the input voltage and will indicate a fault

condition when this voltage is out of range. The UV

and OV pins can be configured in two different ways,

either with a divider on each pin, or with a three-

resistor divider to the same node, enabling the

elimination

one

resistor.

Under-Voltage

monitored by the UV pin input and Over-Voltage is

monitored with the OV pin input.

The Fault pin ( FT ) will indicate a fault (active low)

when the UV pin is below the threshold or when the

OV pin is above the threshold. The UV and OV

thresholds are 0.50V typ with 25mV hysteresis and

their input current is less than ±1µA. It is important to

consider the maximum current that will flow in the

resistor divider and maximum error due to UV and OV

input current. Set the resistor current to 100µA or

higher to maintain 1% accuracy for UV and OV due to

the bias current.

The three-resistor voltage divider configuration for

both UV and OV to monitor the same voltage node is

shown in figure 13:

)

(

Figure 13:

UV & OV three-resistor divider

configuration.

Picor Corporation • picorpower.com

PI2001

Rev 1.0

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