PI2001 datasheet(20/23 Pages) VICOR

20 / 23 page

Layout Recommendation:

Use the following general guidelines when designing

printed circuit boards. An example of the typical land

pattern for a TDFN PI2001 and SO-8/PowerPak

MOSFET is shown in Figure 18:

•

It is best to connect the gate of the MOSFET to

the GATE pin of the controller with a short and

wide trace.

•

The GND pin of the controller carries high peak

current and it should be returned to the ground

plane through a low impedance path.

•

Connections from the SP and SN pins to the

MOSFET source and drain pins respectively

should be as short as possible

•

The VC bypass capacitor should be located as

close as possible to the VC and GND pins. Place

the PI2001 and VC bypass capacitor on the same

layer of the board. The VC pin and CVC PCB trace

should not contain any vias.

•

Connect all MOSFET source pins together with a

wide trace to reduce trace parasitics and to

accommodate the high current input. Similarly,

connect all MOSFET Drain pins together with a

wide trace to accommodate the high current

output.

•

Connect the power source very close to the

MOSFET source connection to reduce the effects

of stray parasitics. If a short trace is not possible,

connect C4 (typically 1µF) as shown in figure 18.

Figure 18:

PI2001 and MOSFET layout

recommendation

Picor Corporation • picorpower.com

PI2001

Rev 1.0

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