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SX1213 Datasheet(PDF) 2 Page - Semtech Corporation

Part # SX1213
Description  Ultra-Low Power Integrated UHF Receiver
PDF  65 Pages
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SX1213 Datasheet(HTML) 2 Page - Semtech Corporation

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SX1213
ADVANCED COMMUNICATIONS & SENSING
Rev.2 – July 1
st, 2009
Page 2 of 65
www.semtech.com
Table of Contents
1. General Description ................................................................... 5
1.1. Simplified Block Diagram................................................... 5
1.2. Pin Diagram ....................................................................... 6
1.3. Pin Description................................................................... 7
2. Electrical Characteristics............................................................ 8
2.1. ESD Notice ........................................................................ 8
2.2. Absolute Maximum Ratings............................................... 8
2.3. Operating Range ............................................................... 8
2.4. Chip Specification.............................................................. 8
2.4.1. Power Consumption.................................................. 8
2.4.2. Frequency Synthesis................................................. 9
2.4.3. Receiver .................................................................. 10
2.4.4. Digital Specification................................................. 11
3. Architecture Description........................................................... 12
3.1. Power Supply Strategy .................................................... 12
3.2. Frequency Synthesis Description .................................... 13
3.2.1. Reference Oscillator................................................ 13
3.2.2. CLKOUT Output ...................................................... 13
3.2.3. PLL Architecture...................................................... 14
3.2.4. PLL Tradeoffs.......................................................... 14
3.2.5. Voltage Controlled Oscillator................................... 15
3.2.6. PLL Loop Filter........................................................ 16
3.2.7. PLL Lock Detection Indicator .................................. 16
3.2.8. Frequency Calculation ............................................ 16
3.3. Receiver Description........................................................ 18
3.3.1. Architecture ............................................................. 18
3.3.2. LNA and First Mixer ................................................ 19
3.3.3. IF Gain and Second I/Q Mixer................................. 19
3.3.4. Channel Filters ........................................................ 19
3.3.5. Channel Filters Setting in FSK Mode ...................... 20
3.3.6. Channel Filters Setting in OOK Mode ..................... 21
3.3.7. RSSI ........................................................................ 21
3.3.8. Fdev Setting in Receive Mode ................................ 23
3.3.9. FSK Demodulator.................................................... 23
3.3.10. OOK Demodulator................................................. 23
3.3.11. Bit Synchronizer .................................................... 26
3.3.12. Alternative Settings ............................................... 27
3.3.13. Data Output ........................................................... 27
4. Operating Modes...................................................................... 28
4.1. Modes of Operation ......................................................... 28
4.2. Digital Pin Configuration vs. Chip Mode .......................... 28
5. Data Processing....................................................................... 29
5.1. Overview.......................................................................... 29
5.1.1. Block Diagram ......................................................... 29
5.1.2. Data Operation Modes ............................................ 29
5.2. Control Block Description ................................................ 30
5.2.1. SPI Interface ........................................................... 30
5.2.2. FIFO ........................................................................ 32
5.2.3. Sync Word Recognition........................................... 34
5.2.4. Packet Handler........................................................ 35
5.2.5. Control..................................................................... 35
5.3. Continuous Mode ............................................................ 36
5.3.1. General Description .................................................36
5.3.2. Rx Processing ..........................................................37
5.3.3. Interrupt Signals Mapping ........................................37
5.3.4. uC Connections........................................................38
5.3.5. Continuous Mode Example ......................................38
5.4. Buffered Mode ..................................................................39
5.4.1. General Description .................................................39
5.4.2. Rx Processing ..........................................................39
5.4.3. Interrupt Signals Mapping ........................................40
5.4.4. uC Connections........................................................41
5.4.5. Buffered Mode Example...........................................41
5.5. Packet Mode.....................................................................42
5.5.1. General Description .................................................42
5.5.2. Packet Format..........................................................42
5.5.3. Rx Processing ..........................................................44
5.5.4. Packet Filtering ........................................................44
5.5.5. DC-Free Data Mechanisms......................................46
5.5.6. Interrupt Signal Mapping ..........................................47
5.5.7. uC Connections........................................................47
5.5.8. Packet Mode Example .............................................48
5.5.9. Additional Information ..............................................48
6. Configuration and Status Registers ..........................................49
6.1. General Description..........................................................49
6.2. Main Configuration Register - MCParam..........................49
6.3. Interrupt Configuration Parameters - IRQParam ..............51
6.4. Receiver Configuration parameters - RXParam ...............53
6.5. Sync Word Parameters - SYNCParam.............................54
6.6. Oscillator Parameters - OSCParam .................................55
6.7. Packet Handling Parameters – PKTParam ......................56
7. Application Information .............................................................57
7.1. Crystal Resonator Specification .......................................57
7.2. Software for Frequency Calculation .................................57
7.2.1. GUI...........................................................................57
7.2.2. .dll for Automatic Production Bench .........................57
7.3. Switching Times and Procedures .....................................57
7.3.1. Optimized Receive Cycle .........................................58
7.3.2. Receiver Frequency Hop Optimized Cycle ..............59
7.4. Reset of the Chip..............................................................60
7.4.1. POR .........................................................................60
7.4.2. Manual Reset ...........................................................60
7.5. Reference Design.............................................................61
7.5.1. Application Schematic..............................................61
7.5.2. PCB Layout ..............................................................61
7.5.3. Bill Of Material..........................................................62
7.5.4. Ordering Information for Tools .................................63
8. Packaging Information ..............................................................63
8.1. Package Outline Drawing .................................................63
8.2. PCB Land Pattern.............................................................64
8.3. Tape & Reel Specification ................................................64
9. Revision History ........................................................................65
10. Contact Information.................................................................65



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